move Azimuth.h to C++11

move Azimuth.h to C++11

--- Util/Azimuth.h
+++ Util/Azimuth.h
@@ -25,33 +25,49 @@

 */

-#ifndef AZIMUTH_H_
-#define AZIMUTH_H_
+#ifndef AZIMUTH_H
+#define AZIMUTH_H

 #include <string>

-struct Azimuth {
-    static std::string Get(const double heading) {
-        if(heading <= 202.5) {
-            if(heading >= 0 && heading <= 22.5)
+struct Azimuth
+{
+    static std::string Get(const double heading)
+    {
+        if (heading <= 202.5)
+        {
+            if (heading >= 0 && heading <= 22.5)
+            {
                 return "N";
-            if(heading > 22.5 && heading <= 67.5)
+            }
+            if (heading > 22.5 && heading <= 67.5)
+            {
                 return "NE";
-            if(heading > 67.5 && heading <= 112.5)
+            }
+            if (heading > 67.5 && heading <= 112.5)
+            {
                 return "E";
-            if(heading > 112.5 && heading <= 157.5)
+            }
+            if (heading > 112.5 && heading <= 157.5)
+            {
                 return "SE";
+            }
             return "S";
         }
-        if(heading > 202.5 && heading <= 247.5)
+        if (heading > 202.5 && heading <= 247.5)
+        {
             return "SW";
-        if(heading > 247.5 && heading <= 292.5)
+        }
+        if (heading > 247.5 && heading <= 292.5)
+        {
             return "W";
-        if(heading > 292.5 && heading <= 337.5)
+        }
+        if (heading > 292.5 && heading <= 337.5)
+        {
             return "NW";
+        }
         return "N";
     }
 };

-
-#endif /* AZIMUTH_H_ */
+#endif // AZIMUTH_H


r12241/sofa-dev : FIX: missing calls to updatePath() in DataFileName and DataFileNameVector

Former-commit-id: 3d1d9f7a684fc479e24cbb42e148f31391424987

--- framework/sofa/core/objectmodel/DataFileName.h
+++ framework/sofa/core/objectmodel/DataFileName.h
@@ -76,16 +76,17 @@
     explicit DataFileName(const Inherit::InitData& init)
         : Inherit(init)
     {
+        updatePath();
     }

     virtual ~DataFileName()
     {
     }

-    void endEdit()
-    {
-        updatePath();
-        Inherit::endEdit();
+    void endEdit(const core::ExecParams* params = 0)
+    {
+        updatePath();
+        Inherit::endEdit(params);
     }

     void setValue(const std::string& v)
@@ -93,6 +94,7 @@
         *beginEdit()=v;
         endEdit();
     }
+    virtual void virtualEndEdit() { endEdit(); }
     virtual void virtualSetValue(const std::string& v) { setValue(v); }
     virtual bool read( std::string& s )
     {
@@ -161,16 +163,17 @@
     explicit DataFileNameVector(const Inherit::InitData& init)
         : Inherit(init)
     {
+        updatePath();
     }

     virtual ~DataFileNameVector()
     {
     }

-    void endEdit()
-    {
-        updatePath();
-        Inherit::endEdit();
+    void endEdit(const core::ExecParams* params = 0)
+    {
+        updatePath();
+        Inherit::endEdit(params);
     }

     void setValue(const std::string& v)
@@ -178,11 +181,12 @@
         beginEdit()->push_back(v);
         endEdit();
     }
+    virtual void virtualEndEdit() { endEdit(); }
     virtual void virtualSetValue(const std::string& v) { setValue(v); }
     virtual bool read( std::string& s )
     {
         bool ret = Inherit::read(s);
-        if (ret) updatePath();
+        if (ret || fullpath.empty()) updatePath();
         return ret;
     }


icside: add module_exit()

icside: add module_exit()

Cc: Russell King <c2093e01fa868776d7876ac617ce6d2ac30cb904@arm.linux.org.uk>
Signed-off-by: Bartlomiej Zolnierkiewicz <248de9df611a028e5eceb9d893a2ed6c24c89ef4@gmail.com>

--- drivers/ide/arm/icside.c
+++ drivers/ide/arm/icside.c
@@ -710,8 +710,14 @@
 	return ecard_register_driver(&icside_driver);
 }

+static void __exit icside_exit(void);
+{
+	ecard_unregister_driver(&icside_driver);
+}
+
 MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
 MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("ICS IDE driver");

 module_init(icside_init);
+module_exit(icside_exit);


Modified audio.c

Modified audio.c

git-svn-id: 38c604b3104e32f2a99bb63601c3e294170c19ce@677 425b54fa-293c-0410-bdda-a7e424c12f17

--- audio.c
+++ audio.c
@@ -81,16 +81,16 @@
     return Qnil;
   if (time <= 50) {
     if (Mix_PlayMusic(sdlBgm, 0))
-      rb_raise_sdl_mixer_error();
+      rb_raise_sdl_mix_error();
   } else {
     if (Mix_FadeInMusic(sdlBgm, 0, time))
-      rb_raise_sdl_mixer_error();
+      rb_raise_sdl_mix_error();
   }
   Mix_RewindMusic();
   if (bgmPosition) {
     bgmPosition = (bgmPosition / 2000 * 2000);
     if (Mix_SetMusicPosition(bgmPosition / 1000))
-      rb_raise_sdl_mixer_error();
+      rb_raise_sdl_mix_error();
   }

   return Qnil;


lv_ta: fixes typo in new line char detection

--- lv_objx/lv_ta.c
+++ lv_objx/lv_ta.c
@@ -190,7 +190,7 @@
 {
     lv_ta_ext_t * ext = lv_obj_get_ext_attr(ta);

-    if(ext->one_line && (c == '\n' || c == '\n')) {
+    if(ext->one_line && (c == '\n' || c == '\r')) {
         LV_LOG_INFO("Text area: line break ignored in one-line mode");
         return;
     }


Pass values by const ref

Pass values by const ref

--- Util/IniFile.h
+++ Util/IniFile.h
@@ -61,8 +61,8 @@
         SetParameter(std::string(key), std::string(value));
     }

-    void SetParameter(const std::string key, std::string value) {
-        parameters[key] = value;
+    void SetParameter(const std::string & key, const std::string & value) {
+        parameters.insert(std::make_pair(key, value));
     }

 private:
@@ -86,4 +86,4 @@
     HashTable<std::string, std::string> parameters;
 };

-#endif /* INI_FILE_H_ */+#endif /* INI_FILE_H_ */


hpt366: HPT36x PCI clock detection fix

hpt366: HPT36x PCI clock detection fix

Fix minor coding mistake in the HPT36x PCI clock detection code noticed by
Bartlomiej Zolnierkiewicz -- it always reported 33 MHz due to the missing
'break' statements.  This, however, most probably never mattered -- in fact, I
was thinking of removing the 25/40 MHz cases completely since HPT36x BIOSes
didn't seem to set any other value than 7 into the 'cmd_high_time' field, i.e.
 supported only 33 MHz PCI.

Note that in the original driver there was another bug: 25 and 40 MHz cases
were interchanged.  Since the 'cmd_high_time' field is in units of PCI clocks,
a lower clock count just *cannot* correspond to a higher frequency, i.  e.  it
should be 5 for 25 MHz PCI and 9 for 40 MHz PCI, not the other way around.

Signed-off-by: Sergei Shtylyov <38a867ea26f35d3eeb42270f1bc7b9d1d135e6a2@ru.mvista.com>
Cc: Alan Cox <91e38e63b890fbb214c8914809fde03c73e7f24d@lxorguk.ukuu.org.uk>
Signed-off-by: Andrew Morton <5c1e68b099950c134891f0b6e179498a8ebe9cf9@osdl.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <248de9df611a028e5eceb9d893a2ed6c24c89ef4@gmail.com>

--- drivers/ide/pci/hpt366.c
+++ drivers/ide/pci/hpt366.c
@@ -1,5 +1,5 @@
 /*
- * linux/drivers/ide/pci/hpt366.c		Version 1.00	Jun 25, 2006
+ * linux/drivers/ide/pci/hpt366.c		Version 1.01	Dec 23, 2006
  *
  * Copyright (C) 1999-2003		Andre Hedrick <andre@linux-ide.org>
  * Portions Copyright (C) 2001	        Sun Microsystems, Inc.
@@ -107,7 +107,8 @@
  *   frequency
  * - switch to using the  DPLL clock and enable UltraATA/133 mode by default on
  *   anything  newer than HPT370/A
- * - fold PCI clock detection and DPLL setup code into init_chipset_hpt366();
+ * - fold PCI clock detection and DPLL setup code into init_chipset_hpt366(),
+ *   also fixing the interchanged 25/40 MHz PCI clock cases for HPT36x chips;
  *   unify HPT36x/37x timing setup code and the speedproc handlers by joining
  *   the register setting lists into the table indexed by the clock selected
  *	Sergei Shtylyov, <sshtylyov@ru.mvista.com> or <source@mvista.com>
@@ -1125,11 +1126,14 @@
 		switch((itr1 >> 8) & 0x07) {
 			case 0x09:
 				pci_clk = 40;
+				break;
 			case 0x05:
 				pci_clk = 25;
+				break;
 			case 0x07:
 			default:
 				pci_clk = 33;
+				break;
 		}
 	}


isdn/capi warning fixes

isdn/capi warning fixes

drivers/isdn/capi/capi.c: In function 'handle_minor_send':
drivers/isdn/capi/capi.c:552: warning: cast from pointer to integer of different size

Of course, the code here might actually be buggy, in which case this patch
should not be applied?

Answer:

  No this field is ignored inside linux kernel.Yes this is ugly, but it's
  the CAPI spec for all OS.

  CAPI DATA_B3 Request/Indication CAPI Message has a mandatory field which
  represent the 32 bit buffer address of the payload data.  In linux the
  payload data do not use a sperate buffer, data follows directely after the
  CAPI Message in the same skb and we use this assumption inside the drivers,
  so we can ignore this field.

  Inside the linux CAPI implemetation we never use this field, so it could
  also have no value, but since random data in a message is bad as well (e.g.
  displayed in CAPI traces) we set is to the most adequate value.

  Outside the kernel the capi20 library sets the correct addresses (there is
  an optional second field for 64 bit adresses for 64 bit systems, we do not
  use here).

Acked-by: Karsten Keil <90bd3ab5dfafb0210c2bd99c94885684b79eea73@suse.de>
Signed-off-by: Andrew Morton <5c1e68b099950c134891f0b6e179498a8ebe9cf9@linux-foundation.org>
Signed-off-by: Linus Torvalds <69652caca27c8b940640ad396ab71f93cacec34f@linux-foundation.org>

--- drivers/isdn/capi/capi.c
+++ drivers/isdn/capi/capi.c
@@ -549,7 +549,7 @@
 		capimsg_setu8 (skb->data, 5, CAPI_REQ);
 		capimsg_setu16(skb->data, 6, mp->msgid++);
 		capimsg_setu32(skb->data, 8, mp->ncci);	/* NCCI */
-		capimsg_setu32(skb->data, 12, (u32) skb->data); /* Data32 */
+		capimsg_setu32(skb->data, 12, (u32)(long)skb->data);/* Data32 */
 		capimsg_setu16(skb->data, 16, len);	/* Data length */
 		capimsg_setu16(skb->data, 18, datahandle);
 		capimsg_setu16(skb->data, 20, 0);	/* Flags */


leds: leds-qpnp: Change max current to 200mA for flash LED

Flash LED requires a max current of 200mA when used as torch light.
Existing implementation 1A for torch light and this might cause
issue for flash usage.

Change-Id: I44f1a9e73f27b6613356f82e20cf123f42172f8d
Signed-off-by: Chun Zhang <1e12ee79693810757a2db1249ffbd23bcb76a0f1@codeaurora.org>

--- drivers/leds/leds-qpnp.c
+++ drivers/leds/leds-qpnp.c
@@ -97,6 +97,7 @@
 #define FLASH_FAULT_DETECT(base)	(base + 0x51)

 #define FLASH_MAX_LEVEL			0x4F
+#define TORCH_MAX_LEVEL			0x0F
 #define	FLASH_NO_MASK			0x00

 #define FLASH_MASK_1			0x20
@@ -663,8 +664,12 @@
 	int rc;
 	int val = led->cdev.brightness;

-	led->flash_cfg->current_prgm = (val * FLASH_MAX_LEVEL /
-						led->max_current);
+	if (led->flash_cfg->torch_enable)
+		led->flash_cfg->current_prgm =
+			(val * TORCH_MAX_LEVEL / led->max_current);
+	else
+		led->flash_cfg->current_prgm =
+			(val * FLASH_MAX_LEVEL / led->max_current);

 	led->flash_cfg->current_prgm =
 		led->flash_cfg->current_prgm >> FLASH_CURRENT_PRGM_SHIFT;
@@ -715,7 +720,7 @@

 			qpnp_led_masked_write(led, FLASH_MAX_CURR(led->base),
 				FLASH_CURRENT_MASK,
-				led->max_current);
+				TORCH_MAX_LEVEL);
 			if (rc) {
 				dev_err(&led->spmi_dev->dev,
 					"Max current reg write failed(%d)\n",
@@ -2319,11 +2324,18 @@
 		return -EINVAL;
 	}

+	led->flash_cfg->torch_enable =
+		of_property_read_bool(node, "qcom,torch-enable");
+
 	rc = of_property_read_u32(node, "qcom,current", &val);
-	if (!rc)
-		led->flash_cfg->current_prgm = (val *
+	if (!rc) {
+		if (led->flash_cfg->torch_enable)
+			led->flash_cfg->current_prgm = (val *
+				TORCH_MAX_LEVEL / led->max_current);
+		else
+			led->flash_cfg->current_prgm = (val *
 				FLASH_MAX_LEVEL / led->max_current);
-	else
+	} else
 		return -EINVAL;

 	rc = of_property_read_u32(node, "qcom,headroom", &val);
@@ -2361,9 +2373,6 @@

 	led->flash_cfg->safety_timer =
 		of_property_read_bool(node, "qcom,safety-timer");
-
-	led->flash_cfg->torch_enable =
-		of_property_read_bool(node, "qcom,torch-enable");

 	return 0;
 }


it83xx/flash: exclude immu tag workaround if chip's core is riscv

This issue is present on chip with N8 core only. So we don't
need to apply the workaround for chip with RISCV core to save
time of writing and erasing.

BUG=none
BRANCH=none
TEST=use console "flasherase" and "flashwrite" commands to erase/write
these two 4KB blocks(0x7e000 ~ 0x7ffff) on both IT8320 and IT81202,
no error message occurred.

Signed-off-by: Dino Li <338d523ecf3700bd86eb9c34d220f91911d2a18c@ite.com.tw>
Change-Id: I9aeb7e32048dafb2fa54bf1a137ecafb5a854b91
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2109438
Reviewed-by: Jett Rink <9d4aef0593e6843318d99df31597fb6153b89787@chromium.org>

--- chip/it83xx/flash.c
+++ chip/it83xx/flash.c
@@ -53,7 +53,7 @@
 /* immu cache size is 8K bytes. */
 #define IMMU_SIZE                 0x2000

-#if CONFIG_FLASH_SIZE == 0x80000
+#if (CONFIG_FLASH_SIZE == 0x80000) && defined(CHIP_CORE_NDS32)
 /* Apply workaround of the issue (b:111808417) */
 #define IMMU_CACHE_TAG_INVALID
 #endif


bcache: Correct printing of btree_gc_max_duration_ms

time_stats::btree_gc_max_duration_mc is not bit shifted by 8

Fixes BUG #138

Change-Id: I44fc6e1d0579674016acc533f1a546b080e5371a
Signed-off-by: Surbhi Palande <f4603bd4ae9e4aa2a11d903d0b178b37a57b1bac@daterainc.com>


stm32: Squeeze fakewp backup register for VbNvContext

We squeeze 2 bytes out of fakewp backup register so that we would have
full 16 bytes for VbNvContext.

As fakewp will go away real soon and it needs just 1 bits, we move it to
saved reset flags register's most significant bit, which is currently
unused.

Signed-off-by: Che-Liang Chiou <57969107b634cf11cb64e9d768fd46929066adab@chromium.org>

BRANCH=snow
BUG=chrome-os-partner:10660,13094
TEST=manual

Make sure reset flags are still preserved:
  1. reset with keyboard.    flags -> reset-pin
  2. trigger watchdog reset. flags -> reset-pin watchdog
  3. 'reboot soft preserve'  flags -> reset-pin watchdog soft
  4. trigger watchdog reset. flags -> reset-pin watchdog
  5. 'reboot soft'           flags -> reset-pin soft

Make sure fakewp is still preserved:
  1. 'flashinfo'      -> no flags
  2. 'fakewp 1'       -> 'wp_gpio_asserted'
  3. 'flashwp enable' -> 'wp_gpio_asserted ro_at_boot'
  4. 'reboot'         -> 'wp_gpio_asserted ro_at_boot ro_now'
  5. 'fakewp 0'       -> 'ro_at_boot ro_now'
  6. 'reboot'         -> 'ro_at_boot'
  7. 'fakewp 1'       -> 'wp_gpio_asserted ro_at_boot'
  8. 'flashwp rw'     -> 'wp_gpio_asserted ro_at_boot rw_at_boot'
  9. 'reboot'         -> 'wp_gpio_asserted ro_at_boot ro_now
                          rw_at_boot rw_now'
  10.'flashwp disable'-> error 7
  11.'flashwp norw'   -> 'wp_gpio_asserted ro_at_boot ro_now rw_now'
  12.'reboot'         -> 'wp_gpio_asserted ro_at_boot ro_now'

Change-Id: Ibb7dc8aa224d3226bbaac217e494565e448b5858
Reviewed-on: https://gerrit.chromium.org/gerrit/32041
Commit-Ready: Che-Liang Chiou <57969107b634cf11cb64e9d768fd46929066adab@chromium.org>
Tested-by: Che-Liang Chiou <57969107b634cf11cb64e9d768fd46929066adab@chromium.org>
Reviewed-by: Randall Spangler <62698fdbb84d1779579ee80c3f39fac22017e5bc@chromium.org>

--- chip/stm32/system.c
+++ chip/stm32/system.c
@@ -9,16 +9,16 @@
 #include "registers.h"
 #include "system.h"
 #include "task.h"
+#include "util.h"
 #include "version.h"
 #include "watchdog.h"
+
+/* TODO: Fake WP is stored at most significant bit of saved reset flags to save
+ * space.  Remove it when we have real write protect pin */

 enum bkpdata_index {
 	BKPDATA_INDEX_SCRATCHPAD,	/* General-purpose scratchpad */
 	BKPDATA_INDEX_SAVED_RESET_FLAGS,/* Saved reset flags */
-	BKPDATA_INDEX_FAKE_WP,		/* Fake write-protect pin */
-					/* TODO: Remove this when we have real
-					 *       write protect pin.
-					 */
 };

@@ -55,12 +55,15 @@
 	uint32_t raw_cause = STM32_RCC_CSR;
 	uint32_t pwr_status = STM32_PWR_CSR;

+	uint32_t fake_wp = flags & 0x8000;
+	flags &= ~0x8000;
+
 	/* Clear the hardware reset cause by setting the RMVF bit */
 	STM32_RCC_CSR |= 1 << 24;
 	/* Clear SBF in PWR_CSR */
 	STM32_PWR_CR |= 1 << 3;
 	/* Clear saved reset flags */
-	bkpdata_write(BKPDATA_INDEX_SAVED_RESET_FLAGS, 0);
+	bkpdata_write(BKPDATA_INDEX_SAVED_RESET_FLAGS, 0 | fake_wp);

 	if (raw_cause & 0x60000000) {
 		/* IWDG or WWDG
@@ -140,8 +143,15 @@
 {
 	uint32_t save_flags = 0;

+	uint32_t fake_wp =
+		bkpdata_read(BKPDATA_INDEX_SAVED_RESET_FLAGS) & 0x8000;
+
 	/* Disable interrupts to avoid task swaps during reboot */
 	interrupt_disable();
+
+	/* TODO: Check if a collision between reset flags and fake wp occurred.
+	 * Remove this when we have real write protect pin. */
+	ASSERT(!(system_get_reset_flags() & 0x8000));

 	/* Save current reset reasons if necessary */
 	if (flags & SYSTEM_RESET_PRESERVE_FLAGS)
@@ -154,7 +164,7 @@
 	if (flags & SYSTEM_RESET_HARD)
 		save_flags |= RESET_FLAG_HARD;

-	bkpdata_write(BKPDATA_INDEX_SAVED_RESET_FLAGS, save_flags);
+	bkpdata_write(BKPDATA_INDEX_SAVED_RESET_FLAGS, save_flags | fake_wp);

 	if (flags & SYSTEM_RESET_HARD) {
 		/* Ask the watchdog to trigger a hard reboot */
@@ -210,12 +220,22 @@
 /* TODO: crosbug.com/p/12036 */
 int system_set_fake_wp(int val)
 {
-	return bkpdata_write(BKPDATA_INDEX_FAKE_WP, (uint16_t)val);
+	uint16_t flags = bkpdata_read(BKPDATA_INDEX_SAVED_RESET_FLAGS);
+
+	if (val)
+		flags |= 0x8000;
+	else
+		flags &= ~0x8000;
+
+	return bkpdata_write(BKPDATA_INDEX_SAVED_RESET_FLAGS, flags);
 }

 /* TODO: crosbug.com/p/12036 */
 int system_get_fake_wp(void)
 {
-	return bkpdata_read(BKPDATA_INDEX_FAKE_WP);
-}
+	if (bkpdata_read(BKPDATA_INDEX_SAVED_RESET_FLAGS) & 0x8000)
+		return 1;
+	else
+		return 0;
+}


raid5-cache: use bio chaining

raid5-cache: use bio chaining

Simplify the bio completion handler by using bio chaining and submitting
bios as soon as they are full.

Signed-off-by: Christoph Hellwig <923f7720577207a44b32e59bbfbea59d27f1ae8e@lst.de>
Reviewed-by: Shaohua Li <c0c0c8857ed6ec93282de3ee9d47e224acf995af@fb.com>
Signed-off-by: NeilBrown <1c00aa603bb92d594c03cff60ecf8e63b2a5bcb1@suse.com>


mfd: pm8xxx-spk: Fix gain value for speaker.

The speaker gain value is not being set properly.
Ignore the current value of speaker gain for setting the
new value as the previous gain is not relevant to the new
value to be set.

Change-Id: I347fbc4052ba479105abe46278763d3c8c27b8e2
CRs-Fixed: 390107
Signed-off-by: Asish Bhattacharya <fabc8c84c888ec05ed5fb694924c4ec949ea7bac@codeaurora.org>

--- drivers/mfd/pm8xxx-spk.c
+++ drivers/mfd/pm8xxx-spk.c
@@ -136,7 +136,7 @@
 	val = pm8xxx_spk_read(PM8XXX_SPK_CTL1_REG_OFF);
 	if (val < 0)
 		return val;
-	val |= (gain << 4);
+	val = (gain << 4) | (val & 0xF);
 	ret = pm8xxx_spk_write(PM8XXX_SPK_CTL1_REG_OFF, val);
 	if (!ret) {
 		pm8xxx_spk_bank_write(the_spk_chip->base


bnx2x: PCI configuration bug on big-endian

The current code read nothing but zeros on big-endian (wrong part of the
32bits). This caused poor performance on big-endian machines. Though this
issue did not cause the system to crash, the performance is significantly
better with the fix so I view it as critical bug fix.

Signed-off-by: Eilon Greenstein <5ba67022bcc5f9ee9b9819ddc35fa83823aa47ee@broadcom.com>
Signed-off-by: David S. Miller <fe08d3c717adf2ae63592e4c9aec6e3e404d8e3e@davemloft.net>

--- drivers/net/bnx2x_init.h
+++ drivers/net/bnx2x_init.h
@@ -564,14 +564,15 @@

 static void bnx2x_init_pxp(struct bnx2x *bp)
 {
+	u16 devctl;
 	int r_order, w_order;
 	u32 val, i;

 	pci_read_config_word(bp->pdev,
-			     bp->pcie_cap + PCI_EXP_DEVCTL, (u16 *)&val);
-	DP(NETIF_MSG_HW, "read 0x%x from devctl\n", (u16)val);
-	w_order = ((val & PCI_EXP_DEVCTL_PAYLOAD) >> 5);
-	r_order = ((val & PCI_EXP_DEVCTL_READRQ) >> 12);
+			     bp->pcie_cap + PCI_EXP_DEVCTL, &devctl);
+	DP(NETIF_MSG_HW, "read 0x%x from devctl\n", devctl);
+	w_order = ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5);
+	r_order = ((devctl & PCI_EXP_DEVCTL_READRQ) >> 12);

 	if (r_order > MAX_RD_ORD) {
 		DP(NETIF_MSG_HW, "read order of %d  order adjusted to %d\n",


bnx2x: tx_has_work should not wait for FW

The current tx_has_work waited until all packets sent by the driver
are marked as completed by the FW. This is too greedy and it causes
the bnx2x_poll to spin in vain. The driver should only check that all
packets FW already completed are freed - only in unload flow the
driver should make sure that transmit queue is empty

Signed-off-by: Vladislav Zolotarov <976c0f8d0852ed6439ad273880b400a75a7c41d0@broadcom.com>
Signed-off-by: Eilon Greenstein <5ba67022bcc5f9ee9b9819ddc35fa83823aa47ee@broadcom.com>
Signed-off-by: David S. Miller <fe08d3c717adf2ae63592e4c9aec6e3e404d8e3e@davemloft.net>

--- drivers/net/bnx2x_main.c
+++ drivers/net/bnx2x_main.c
@@ -57,8 +57,8 @@
 #include "bnx2x.h"
 #include "bnx2x_init.h"

-#define DRV_MODULE_VERSION	"1.45.25"
-#define DRV_MODULE_RELDATE	"2009/01/22"
+#define DRV_MODULE_VERSION	"1.45.26"
+#define DRV_MODULE_RELDATE	"2009/01/26"
 #define BNX2X_BC_VER		0x040200

 /* Time in jiffies before concluding the transmitter is hung */
@@ -740,8 +740,15 @@
 	/* Tell compiler that status block fields can change */
 	barrier();
 	tx_cons_sb = le16_to_cpu(*fp->tx_cons_sb);
-	return ((fp->tx_pkt_prod != tx_cons_sb) ||
-		(fp->tx_pkt_prod != fp->tx_pkt_cons));
+	return (fp->tx_pkt_cons != tx_cons_sb);
+}
+
+static inline int bnx2x_has_tx_work_unload(struct bnx2x_fastpath *fp)
+{
+	/* Tell compiler that consumer and producer can change */
+	barrier();
+	return (fp->tx_pkt_prod != fp->tx_pkt_cons);
+
 }

 /* free skb in the packet ring at pos idx
@@ -6729,7 +6736,7 @@

 		cnt = 1000;
 		smp_rmb();
-		while (bnx2x_has_tx_work(fp)) {
+		while (bnx2x_has_tx_work_unload(fp)) {

 			bnx2x_tx_int(fp, 1000);
 			if (!cnt) {


tests/gem_cpu_concurrent_blit: stop signal helper again

Not doing so totally upsets the piglit igt runner since we leave
a bunch of zombies behind.

Signed-off-by: Daniel Vetter <c1b6782c4af8f0673da8923a0702a1832e5940f4@ffwll.ch>

--- tests/gem_cpu_concurrent_blit.c
+++ tests/gem_cpu_concurrent_blit.c
@@ -198,7 +198,7 @@
 		}
 	}

-	drmtest_fork_signal_helper();
+	drmtest_stop_signal_helper();

 	return 0;
 }


time & gettimeofday: Use glibc wrapper (which uses vDSO) instead of deprecated vsyscall.

--- fsyscall.h
+++ fsyscall.h
@@ -318,22 +318,10 @@
 def_fsys(umount2,umount2,int,2,const char *,int)
 def_fsys(pivot_root,pivot_root,int,2,const char *,const char *)

-#if defined __LP64__ // AMD64 ABI
-fsys_inline long fsys_time(long *t) {
-	long (*vtime)(long *) = (long (*)(long *)) 0xffffffffff600400ul;
-	return vtime (t);
-}
-
-fsys_inline int fsys_gettimeofday(struct timeval *tv, void *tz) {
-	int (*vgettimeofday)(struct timeval *, void *) = (int (*)(struct timeval *, void *))
-		0xffffffffff600000;
-	return vgettimeofday(tv, tz);
-}
-#else // X32 ABI
-// Call the glibc routine so that we can take advantage of VDSO
-# define fsys_time time
-# define fsys_gettimeofday gettimeofday
-#endif
+// vsyscall is nowadays deprecated; We should use vDSO instead, of which modern glibc
+// takes good care.
+#define fsys_time time
+#define fsys_gettimeofday gettimeofday

 fsys_inline int fsys_sched_getcpu (void)
 {


bnx2x: EEH recovery fix

bnx2x: EEH recovery fix

When EEH detects an i/o error it resets the device thus it cannot be accessed.
In this case the driver needs to unload its interface only with OS, kernel and
network stack but not with the device.
After successful recovery, the driver can load normally.

Signed-off-by: Yitchak Gertner <1f09c26b05a8cec8db222ea12302fde278a7b99e@broadcom.com>
Signed-off-by: Eilon Greenstein <5ba67022bcc5f9ee9b9819ddc35fa83823aa47ee@broadcom.com>
Signed-off-by: David S. Miller <fe08d3c717adf2ae63592e4c9aec6e3e404d8e3e@davemloft.net>

--- drivers/net/bnx2x_main.c
+++ drivers/net/bnx2x_main.c
@@ -59,8 +59,8 @@
 #include "bnx2x.h"
 #include "bnx2x_init.h"

-#define DRV_MODULE_VERSION	"1.45.21"
-#define DRV_MODULE_RELDATE	"2008/09/03"
+#define DRV_MODULE_VERSION	"1.45.22"
+#define DRV_MODULE_RELDATE	"2008/09/09"
 #define BNX2X_BC_VER		0x040200

 /* Time in jiffies before concluding the transmitter is hung */
@@ -649,15 +649,16 @@
 		BNX2X_ERR("BUG! proper val not read from IGU!\n");
 }

-static void bnx2x_int_disable_sync(struct bnx2x *bp)
+static void bnx2x_int_disable_sync(struct bnx2x *bp, int disable_hw)
 {
 	int msix = (bp->flags & USING_MSIX_FLAG) ? 1 : 0;
 	int i;

 	/* disable interrupt handling */
 	atomic_inc(&bp->intr_sem);
-	/* prevent the HW from sending interrupts */
-	bnx2x_int_disable(bp);
+	if (disable_hw)
+		/* prevent the HW from sending interrupts */
+		bnx2x_int_disable(bp);

 	/* make sure all ISRs are done */
 	if (msix) {
@@ -6086,9 +6087,9 @@
 	}
 }

-static void bnx2x_netif_stop(struct bnx2x *bp)
-{
-	bnx2x_int_disable_sync(bp);
+static void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw)
+{
+	bnx2x_int_disable_sync(bp, disable_hw);
 	if (netif_running(bp->dev)) {
 		bnx2x_napi_disable(bp);
 		netif_tx_disable(bp->dev);
@@ -6475,7 +6476,7 @@
 	for_each_queue(bp, i)
 		bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
 load_int_disable:
-	bnx2x_int_disable_sync(bp);
+	bnx2x_int_disable_sync(bp, 1);
 	/* Release IRQs */
 	bnx2x_free_irq(bp);
 load_error:
@@ -6650,7 +6651,7 @@
 	bp->rx_mode = BNX2X_RX_MODE_NONE;
 	bnx2x_set_storm_rx_mode(bp);

-	bnx2x_netif_stop(bp);
+	bnx2x_netif_stop(bp, 1);
 	if (!netif_running(bp->dev))
 		bnx2x_napi_disable(bp);
 	del_timer_sync(&bp->timer);
@@ -8791,7 +8792,7 @@
 	if (!netif_running(bp->dev))
 		return BNX2X_LOOPBACK_FAILED;

-	bnx2x_netif_stop(bp);
+	bnx2x_netif_stop(bp, 1);

 	if (bnx2x_run_loopback(bp, BNX2X_MAC_LOOPBACK, link_up)) {
 		DP(NETIF_MSG_PROBE, "MAC loopback failed\n");
@@ -10346,6 +10347,74 @@
 	return rc;
 }

+static int bnx2x_eeh_nic_unload(struct bnx2x *bp)
+{
+	int i;
+
+	bp->state = BNX2X_STATE_ERROR;
+
+	bp->rx_mode = BNX2X_RX_MODE_NONE;
+
+	bnx2x_netif_stop(bp, 0);
+
+	del_timer_sync(&bp->timer);
+	bp->stats_state = STATS_STATE_DISABLED;
+	DP(BNX2X_MSG_STATS, "stats_state - DISABLED\n");
+
+	/* Release IRQs */
+	bnx2x_free_irq(bp);
+
+	if (CHIP_IS_E1(bp)) {
+		struct mac_configuration_cmd *config =
+						bnx2x_sp(bp, mcast_config);
+
+		for (i = 0; i < config->hdr.length_6b; i++)
+			CAM_INVALIDATE(config->config_table[i]);
+	}
+
+	/* Free SKBs, SGEs, TPA pool and driver internals */
+	bnx2x_free_skbs(bp);
+	for_each_queue(bp, i)
+		bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
+	bnx2x_free_mem(bp);
+
+	bp->state = BNX2X_STATE_CLOSED;
+
+	netif_carrier_off(bp->dev);
+
+	return 0;
+}
+
+static void bnx2x_eeh_recover(struct bnx2x *bp)
+{
+	u32 val;
+
+	mutex_init(&bp->port.phy_mutex);
+
+	bp->common.shmem_base = REG_RD(bp, MISC_REG_SHARED_MEM_ADDR);
+	bp->link_params.shmem_base = bp->common.shmem_base;
+	BNX2X_DEV_INFO("shmem offset is 0x%x\n", bp->common.shmem_base);
+
+	if (!bp->common.shmem_base ||
+	    (bp->common.shmem_base < 0xA0000) ||
+	    (bp->common.shmem_base >= 0xC0000)) {
+		BNX2X_DEV_INFO("MCP not active\n");
+		bp->flags |= NO_MCP_FLAG;
+		return;
+	}
+
+	val = SHMEM_RD(bp, validity_map[BP_PORT(bp)]);
+	if ((val & (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB))
+		!= (SHR_MEM_VALIDITY_DEV_INFO | SHR_MEM_VALIDITY_MB))
+		BNX2X_ERR("BAD MCP validity signature\n");
+
+	if (!BP_NOMCP(bp)) {
+		bp->fw_seq = (SHMEM_RD(bp, func_mb[BP_FUNC(bp)].drv_mb_header)
+			      & DRV_MSG_SEQ_NUMBER_MASK);
+		BNX2X_DEV_INFO("fw_seq 0x%08x\n", bp->fw_seq);
+	}
+}
+
 /**
  * bnx2x_io_error_detected - called when PCI error is detected
  * @pdev: Pointer to PCI device
@@ -10365,7 +10434,7 @@
 	netif_device_detach(dev);

 	if (netif_running(dev))
-		bnx2x_nic_unload(bp, UNLOAD_CLOSE);
+		bnx2x_eeh_nic_unload(bp);

 	pci_disable_device(pdev);

@@ -10420,8 +10489,10 @@

 	rtnl_lock();

+	bnx2x_eeh_recover(bp);
+
 	if (netif_running(dev))
-		bnx2x_nic_load(bp, LOAD_OPEN);
+		bnx2x_nic_load(bp, LOAD_NORMAL);

 	netif_device_attach(dev);


net: phy: at803x: Add support for hardware reset

The AT8030 will enter a FIFO error mode if a packet is transmitted while
the cable is unplugged. This hardware issue is acknowledged by the
vendor, and the only proposed solution is to conduct a hardware reset
via the external pin each time the link goes down. There is apparantly
no way to fix up the state via the register set.

This patch adds support for reading a 'reset-gpios' property from the DT
node of the PHY. If present, this gpio is used to apply a hardware reset
each time a 'link down' condition is detected. All relevant registers
are read out before, and written back after the reset cycle.

Doing this every time the link goes down might seem like overkill, but
there is unfortunately no way of figuring out whether the PHY is in
such a lock-up state. Hence, this is the only way of reliably fixing up
things.

Signed-off-by: Daniel Mack <70806a71956ed8873ecff8522779dae1401a1b4a@gmail.com>
Signed-off-by: David S. Miller <fe08d3c717adf2ae63592e4c9aec6e3e404d8e3e@davemloft.net>


[PATCH] sb1250-mac: Whitespace cleanup.

[PATCH] sb1250-mac: Whitespace cleanup.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

 drivers/net/sb1250-mac.c | 1030 +++++++++++++++++++++++------------------------
 1 files changed, 515 insertions(+), 515 deletions(-)
Signed-off-by: Jeff Garzik <15f615bf7d20c2937c7eb5aa759110fd6768848c@pobox.com>

--- drivers/net/sb1250-mac.c
+++ drivers/net/sb1250-mac.c
@@ -10,7 +10,7 @@
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
- *
+ *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
@@ -127,7 +127,7 @@
 typedef enum { sbmac_fc_auto, sbmac_fc_disabled, sbmac_fc_frame,
 	       sbmac_fc_collision, sbmac_fc_carrier } sbmac_fc_t;

-typedef enum { sbmac_state_uninit, sbmac_state_off, sbmac_state_on,
+typedef enum { sbmac_state_uninit, sbmac_state_off, sbmac_state_on,
 	       sbmac_state_broken } sbmac_state_t;

@@ -147,8 +147,8 @@

 #define ETHER_ALIGN	2
 #define ETHER_ADDR_LEN	6
-#define ENET_PACKET_SIZE	1518
-/*#define ENET_PACKET_SIZE	9216 */
+#define ENET_PACKET_SIZE	1518
+/*#define ENET_PACKET_SIZE	9216 */

 /**********************************************************************
  *  DMA Descriptor structure
@@ -166,12 +166,12 @@
  ********************************************************************* */

 typedef struct sbmacdma_s {
-
-	/*
+
+	/*
 	 * This stuff is used to identify the channel and the registers
 	 * associated with it.
 	 */
-
+
 	struct sbmac_softc *sbdma_eth;	        /* back pointer to associated MAC */
 	int              sbdma_channel;	/* channel number */
 	int		 sbdma_txdir;       /* direction (1=transmit) */
@@ -186,16 +186,16 @@
 	volatile void __iomem *sbdma_dscrbase;	/* Descriptor base address */
 	volatile void __iomem *sbdma_dscrcnt;     /* Descriptor count register */
 	volatile void __iomem *sbdma_curdscr;	/* current descriptor address */
-
+
 	/*
 	 * This stuff is for maintenance of the ring
 	 */
-
+
 	sbdmadscr_t     *sbdma_dscrtable;	/* base of descriptor table */
 	sbdmadscr_t     *sbdma_dscrtable_end; /* end of descriptor table */
-
+
 	struct sk_buff **sbdma_ctxtable;    /* context table, one per descr */
-
+
 	paddr_t          sbdma_dscrtable_phys; /* and also the phys addr */
 	sbdmadscr_t     *sbdma_addptr;	/* next dscr for sw to add */
 	sbdmadscr_t     *sbdma_remptr;	/* next dscr for sw to remove */
@@ -207,15 +207,15 @@
  ********************************************************************* */

 struct sbmac_softc {
-
+
 	/*
 	 * Linux-specific things
 	 */
-
+
 	struct net_device *sbm_dev;		/* pointer to linux device */
 	spinlock_t sbm_lock;		/* spin lock */
 	struct timer_list sbm_timer;     	/* for monitoring MII */
-	struct net_device_stats sbm_stats;
+	struct net_device_stats sbm_stats;
 	int sbm_devflags;			/* current device flags */

 	int	     sbm_phy_oldbmsr;
@@ -223,16 +223,16 @@
 	int	     sbm_phy_oldk1stsr;
 	int	     sbm_phy_oldlinkstat;
 	int sbm_buffersize;
-
+
 	unsigned char sbm_phys[2];
-
+
 	/*
 	 * Controller-specific things
 	 */
-
+
 	volatile void __iomem *sbm_base;          /* MAC's base address */
 	sbmac_state_t    sbm_state;         /* current state */
-
+
 	volatile void __iomem	*sbm_macenable;	/* MAC Enable Register */
 	volatile void __iomem	*sbm_maccfg;	/* MAC Configuration Register */
 	volatile void __iomem	*sbm_fifocfg;	/* FIFO configuration register */
@@ -241,13 +241,13 @@
 	volatile void __iomem	*sbm_isr;	/* Interrupt status register */
 	volatile void __iomem	*sbm_imr;	/* Interrupt mask register */
 	volatile void __iomem	*sbm_mdio;	/* MDIO register */
-
+
 	sbmac_speed_t    sbm_speed;		/* current speed */
 	sbmac_duplex_t   sbm_duplex;	/* current duplex */
 	sbmac_fc_t       sbm_fc;		/* current flow control setting */
-
+
 	unsigned char    sbm_hwaddr[ETHER_ADDR_LEN];
-
+
 	sbmacdma_t       sbm_txdma;		/* for now, only use channel 0 */
 	sbmacdma_t       sbm_rxdma;
 	int              rx_hw_checksum;
@@ -444,13 +444,13 @@

 /**********************************************************************
  *  SBMAC_MII_SYNC(s)
- *
+ *
  *  Synchronize with the MII - send a pattern of bits to the MII
  *  that will guarantee that it is ready to accept a command.
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   s - sbmac structure
- *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
@@ -462,11 +462,11 @@
 	int mac_mdio_genc;

 	mac_mdio_genc = __raw_readq(s->sbm_mdio) & M_MAC_GENC;
-
+
 	bits = M_MAC_MDIO_DIR_OUTPUT | M_MAC_MDIO_OUT;
-
+
 	__raw_writeq(bits | mac_mdio_genc, s->sbm_mdio);
-
+
 	for (cnt = 0; cnt < 32; cnt++) {
 		__raw_writeq(bits | M_MAC_MDC | mac_mdio_genc, s->sbm_mdio);
 		__raw_writeq(bits | mac_mdio_genc, s->sbm_mdio);
@@ -475,11 +475,11 @@

 /**********************************************************************
  *  SBMAC_MII_SENDDATA(s,data,bitcnt)
- *
+ *
  *  Send some bits to the MII.  The bits to be sent are right-
  *  justified in the 'data' parameter.
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   s - sbmac structure
  *  	   data - data to send
  *  	   bitcnt - number of bits to send
@@ -493,12 +493,12 @@
 	int mac_mdio_genc;

 	mac_mdio_genc = __raw_readq(s->sbm_mdio) & M_MAC_GENC;
-
+
 	bits = M_MAC_MDIO_DIR_OUTPUT;
 	__raw_writeq(bits | mac_mdio_genc, s->sbm_mdio);
-
+
 	curmask = 1 << (bitcnt - 1);
-
+
 	for (i = 0; i < bitcnt; i++) {
 		if (data & curmask)
 			bits |= M_MAC_MDIO_OUT;
@@ -514,14 +514,14 @@

 /**********************************************************************
  *  SBMAC_MII_READ(s,phyaddr,regidx)
- *
+ *
  *  Read a PHY register.
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   s - sbmac structure
  *  	   phyaddr - PHY's address
  *  	   regidx = index of register to read
- *
+ *
  *  Return value:
  *  	   value read, or 0 if an error occurred.
  ********************************************************************* */
@@ -537,9 +537,9 @@
 	 * Synchronize ourselves so that the PHY knows the next
 	 * thing coming down is a command
 	 */
-
+
 	sbmac_mii_sync(s);
-
+
 	/*
 	 * Send the data to the PHY.  The sequence is
 	 * a "start" command (2 bits)
@@ -547,55 +547,55 @@
 	 * the PHY addr (5 bits)
 	 * the register index (5 bits)
 	 */
-
+
 	sbmac_mii_senddata(s,MII_COMMAND_START, 2);
 	sbmac_mii_senddata(s,MII_COMMAND_READ, 2);
 	sbmac_mii_senddata(s,phyaddr, 5);
 	sbmac_mii_senddata(s,regidx, 5);
-
+
 	mac_mdio_genc = __raw_readq(s->sbm_mdio) & M_MAC_GENC;
-
-	/*
+
+	/*
 	 * Switch the port around without a clock transition.
 	 */
 	__raw_writeq(M_MAC_MDIO_DIR_INPUT | mac_mdio_genc, s->sbm_mdio);
-
+
 	/*
 	 * Send out a clock pulse to signal we want the status
 	 */
-
+
 	__raw_writeq(M_MAC_MDIO_DIR_INPUT | M_MAC_MDC | mac_mdio_genc, s->sbm_mdio);
 	__raw_writeq(M_MAC_MDIO_DIR_INPUT | mac_mdio_genc, s->sbm_mdio);
-
-	/*
+
+	/*
 	 * If an error occurred, the PHY will signal '1' back
 	 */
 	error = __raw_readq(s->sbm_mdio) & M_MAC_MDIO_IN;
-
-	/*
+
+	/*
 	 * Issue an 'idle' clock pulse, but keep the direction
 	 * the same.
 	 */
 	__raw_writeq(M_MAC_MDIO_DIR_INPUT | M_MAC_MDC | mac_mdio_genc, s->sbm_mdio);
 	__raw_writeq(M_MAC_MDIO_DIR_INPUT | mac_mdio_genc, s->sbm_mdio);
-
+
 	regval = 0;
-
+
 	for (idx = 0; idx < 16; idx++) {
 		regval <<= 1;
-
+
 		if (error == 0) {
 			if (__raw_readq(s->sbm_mdio) & M_MAC_MDIO_IN)
 				regval |= 1;
 		}
-
+
 		__raw_writeq(M_MAC_MDIO_DIR_INPUT|M_MAC_MDC | mac_mdio_genc, s->sbm_mdio);
 		__raw_writeq(M_MAC_MDIO_DIR_INPUT | mac_mdio_genc, s->sbm_mdio);
 	}
-
+
 	/* Switch back to output */
 	__raw_writeq(M_MAC_MDIO_DIR_OUTPUT | mac_mdio_genc, s->sbm_mdio);
-
+
 	if (error == 0)
 		return regval;
 	return 0;
@@ -604,15 +604,15 @@

 /**********************************************************************
  *  SBMAC_MII_WRITE(s,phyaddr,regidx,regval)
- *
+ *
  *  Write a value to a PHY register.
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   s - sbmac structure
  *  	   phyaddr - PHY to use
  *  	   regidx - register within the PHY
  *  	   regval - data to write to register
- *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
@@ -623,7 +623,7 @@
 	int mac_mdio_genc;

 	sbmac_mii_sync(s);
-
+
 	sbmac_mii_senddata(s,MII_COMMAND_START,2);
 	sbmac_mii_senddata(s,MII_COMMAND_WRITE,2);
 	sbmac_mii_senddata(s,phyaddr, 5);
@@ -640,18 +640,18 @@

 /**********************************************************************
  *  SBDMA_INITCTX(d,s,chan,txrx,maxdescr)
- *
+ *
  *  Initialize a DMA channel context.  Since there are potentially
  *  eight DMA channels per MAC, it's nice to do this in a standard
- *  way.
- *
- *  Input parameters:
+ *  way.
+ *
+ *  Input parameters:
  *  	   d - sbmacdma_t structure (DMA channel context)
  *  	   s - sbmac_softc structure (pointer to a MAC)
  *  	   chan - channel number (0..1 right now)
  *  	   txrx - Identifies DMA_TX or DMA_RX for channel direction
  *      maxdescr - number of descriptors
- *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
@@ -662,14 +662,14 @@
 			  int txrx,
 			  int maxdescr)
 {
-	/*
-	 * Save away interesting stuff in the structure
-	 */
-
+	/*
+	 * Save away interesting stuff in the structure
+	 */
+
 	d->sbdma_eth       = s;
 	d->sbdma_channel   = chan;
 	d->sbdma_txdir     = txrx;
-
+
 #if 0
 	/* RMON clearing */
 	s->sbe_idx =(s->sbm_base - A_MAC_BASE_0)/MAC_SPACING;
@@ -697,28 +697,28 @@
 	__raw_writeq(0, IOADDR(A_MAC_REGISTER(s->sbe_idx, R_MAC_RMON_RX_CODE_ERROR)));
 	__raw_writeq(0, IOADDR(A_MAC_REGISTER(s->sbe_idx, R_MAC_RMON_RX_ALIGN_ERROR)));

-	/*
-	 * initialize register pointers
-	 */
-
-	d->sbdma_config0 =
+	/*
+	 * initialize register pointers
+	 */
+
+	d->sbdma_config0 =
 		s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_CONFIG0);
-	d->sbdma_config1 =
+	d->sbdma_config1 =
 		s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_CONFIG1);
-	d->sbdma_dscrbase =
+	d->sbdma_dscrbase =
 		s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_DSCR_BASE);
-	d->sbdma_dscrcnt =
+	d->sbdma_dscrcnt =
 		s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_DSCR_CNT);
-	d->sbdma_curdscr =
+	d->sbdma_curdscr =
 		s->sbm_base + R_MAC_DMA_REGISTER(txrx,chan,R_MAC_DMA_CUR_DSCRADDR);
-
+
 	/*
 	 * Allocate memory for the ring
 	 */
-
+
 	d->sbdma_maxdescr = maxdescr;
-
-	d->sbdma_dscrtable = (sbdmadscr_t *)
+
+	d->sbdma_dscrtable = (sbdmadscr_t *)
 		kmalloc((d->sbdma_maxdescr+1)*sizeof(sbdmadscr_t), GFP_KERNEL);

 	/*
@@ -727,22 +727,22 @@
 	 */
 	d->sbdma_dscrtable = (sbdmadscr_t *)
 		ALIGN((unsigned long)d->sbdma_dscrtable, sizeof(sbdmadscr_t));
-
+
 	memset(d->sbdma_dscrtable,0,d->sbdma_maxdescr*sizeof(sbdmadscr_t));
-
+
 	d->sbdma_dscrtable_end = d->sbdma_dscrtable + d->sbdma_maxdescr;
-
+
 	d->sbdma_dscrtable_phys = virt_to_phys(d->sbdma_dscrtable);
-
+
 	/*
 	 * And context table
 	 */
-
-	d->sbdma_ctxtable = (struct sk_buff **)
+
+	d->sbdma_ctxtable = (struct sk_buff **)
 		kmalloc(d->sbdma_maxdescr*sizeof(struct sk_buff *), GFP_KERNEL);
-
+
 	memset(d->sbdma_ctxtable,0,d->sbdma_maxdescr*sizeof(struct sk_buff *));
-
+
 #ifdef CONFIG_SBMAC_COALESCE
 	/*
 	 * Setup Rx/Tx DMA coalescing defaults
@@ -753,7 +753,7 @@
 	} else {
 		d->sbdma_int_pktcnt = 1;
 	}
-
+
 	if ( int_timeout ) {
 		d->sbdma_int_timeout = int_timeout;
 	} else {
@@ -765,13 +765,13 @@

 /**********************************************************************
  *  SBDMA_CHANNEL_START(d)
- *
+ *
  *  Initialize the hardware registers for a DMA channel.
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   d - DMA channel to init (context must be previously init'd
  *         rxtx - DMA_RX or DMA_TX depending on what type of channel
- *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
@@ -781,7 +781,7 @@
 	/*
 	 * Turn on the DMA channel
 	 */
-
+
 #ifdef CONFIG_SBMAC_COALESCE
 	__raw_writeq(V_DMA_INT_TIMEOUT(d->sbdma_int_timeout) |
 		       0, d->sbdma_config1);
@@ -807,12 +807,12 @@

 /**********************************************************************
  *  SBDMA_CHANNEL_STOP(d)
- *
+ *
  *  Initialize the hardware registers for a DMA channel.
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   d - DMA channel to init (context must be previously init'd
- *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
@@ -822,17 +822,17 @@
 	/*
 	 * Turn off the DMA channel
 	 */
-
+
 	__raw_writeq(0, d->sbdma_config1);
-
+
 	__raw_writeq(0, d->sbdma_dscrbase);
-
+
 	__raw_writeq(0, d->sbdma_config0);
-
+
 	/*
 	 * Zero ring pointers
 	 */
-
+
 	d->sbdma_addptr = NULL;
 	d->sbdma_remptr = NULL;
 }
@@ -841,25 +841,25 @@
 {
 	unsigned long addr;
 	unsigned long newaddr;
-
+
 	addr = (unsigned long) skb->data;
-
+
 	newaddr = (addr + power2 - 1) & ~(power2 - 1);
-
+
 	skb_reserve(skb,newaddr-addr+offset);
 }

 /**********************************************************************
  *  SBDMA_ADD_RCVBUFFER(d,sb)
- *
+ *
  *  Add a buffer to the specified DMA channel.   For receive channels,
  *  this queues a buffer for inbound packets.
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   d - DMA channel descriptor
  * 	   sb - sk_buff to add, or NULL if we should allocate one
- *
+ *
  *  Return value:
  *  	   0 if buffer could not be added (ring is full)
  *  	   1 if buffer added successfully
@@ -872,24 +872,24 @@
 	sbdmadscr_t *nextdsc;
 	struct sk_buff *sb_new = NULL;
 	int pktsize = ENET_PACKET_SIZE;
-
+
 	/* get pointer to our current place in the ring */
-
+
 	dsc = d->sbdma_addptr;
 	nextdsc = SBDMA_NEXTBUF(d,sbdma_addptr);
-
+
 	/*
 	 * figure out if the ring is full - if the next descriptor
 	 * is the same as the one that we're going to remove from
 	 * the ring, the ring is full
 	 */
-
+
 	if (nextdsc == d->sbdma_remptr) {
 		return -ENOSPC;
 	}

-	/*
-	 * Allocate a sk_buff if we don't already have one.
+	/*
+	 * Allocate a sk_buff if we don't already have one.
 	 * If we do have an sk_buff, reset it so that it's empty.
 	 *
 	 * Note: sk_buffs don't seem to be guaranteed to have any sort
@@ -898,7 +898,7 @@
 	 *
 	 *    1. the data does not start in the middle of a cache line.
 	 *    2. The data does not end in the middle of a cache line
-	 *    3. The buffer can be aligned such that the IP addresses are
+	 *    3. The buffer can be aligned such that the IP addresses are
 	 *       naturally aligned.
 	 *
 	 *  Remember, the SOCs MAC writes whole cache lines at a time,
@@ -906,7 +906,7 @@
 	 *  data portion starts in the middle of a cache line, the SOC
 	 *  DMA will trash the beginning (and ending) portions.
 	 */
-
+
 	if (sb == NULL) {
 		sb_new = dev_alloc_skb(ENET_PACKET_SIZE + SMP_CACHE_BYTES * 2 + ETHER_ALIGN);
 		if (sb_new == NULL) {
@@ -922,16 +922,16 @@
 	}
 	else {
 		sb_new = sb;
-		/*
+		/*
 		 * nothing special to reinit buffer, it's already aligned
 		 * and sb->data already points to a good place.
 		 */
 	}
-
-	/*
-	 * fill in the descriptor
-	 */
-
+
+	/*
+	 * fill in the descriptor
+	 */
+
 #ifdef CONFIG_SBMAC_COALESCE
 	/*
 	 * Do not interrupt per DMA transfer.
@@ -946,38 +946,38 @@

 	/* receiving: no options */
 	dsc->dscr_b = 0;
-
-	/*
-	 * fill in the context
-	 */
-
+
+	/*
+	 * fill in the context
+	 */
+
 	d->sbdma_ctxtable[dsc-d->sbdma_dscrtable] = sb_new;
-
-	/*
-	 * point at next packet
-	 */
-
+
+	/*
+	 * point at next packet
+	 */
+
 	d->sbdma_addptr = nextdsc;
-
-	/*
+
+	/*
 	 * Give the buffer to the DMA engine.
 	 */
-
+
 	__raw_writeq(1, d->sbdma_dscrcnt);
-
+
 	return 0;					/* we did it */
 }

 /**********************************************************************
  *  SBDMA_ADD_TXBUFFER(d,sb)
- *
+ *
  *  Add a transmit buffer to the specified DMA channel, causing a
  *  transmit to start.
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   d - DMA channel descriptor
  * 	   sb - sk_buff to add
- *
+ *
  *  Return value:
  *  	   0 transmit queued successfully
  *  	   otherwise error code
@@ -991,70 +991,70 @@
 	uint64_t phys;
 	uint64_t ncb;
 	int length;
-
+
 	/* get pointer to our current place in the ring */
-
+
 	dsc = d->sbdma_addptr;
 	nextdsc = SBDMA_NEXTBUF(d,sbdma_addptr);
-
+
 	/*
 	 * figure out if the ring is full - if the next descriptor
 	 * is the same as the one that we're going to remove from
 	 * the ring, the ring is full
 	 */
-
+
 	if (nextdsc == d->sbdma_remptr) {
 		return -ENOSPC;
 	}
-
+
 	/*
 	 * Under Linux, it's not necessary to copy/coalesce buffers
 	 * like it is on NetBSD.  We think they're all contiguous,
 	 * but that may not be true for GBE.
 	 */
-
+
 	length = sb->len;
-
+
 	/*
 	 * fill in the descriptor.  Note that the number of cache
 	 * blocks in the descriptor is the number of blocks
 	 * *spanned*, so we need to add in the offset (if any)
 	 * while doing the calculation.
 	 */
-
+
 	phys = virt_to_phys(sb->data);
 	ncb = NUMCACHEBLKS(length+(phys & (SMP_CACHE_BYTES - 1)));

-	dsc->dscr_a = phys |
+	dsc->dscr_a = phys |
 		V_DMA_DSCRA_A_SIZE(ncb) |
 #ifndef CONFIG_SBMAC_COALESCE
 		M_DMA_DSCRA_INTERRUPT |
 #endif
 		M_DMA_ETHTX_SOP;
-
+
 	/* transmitting: set outbound options and length */

 	dsc->dscr_b = V_DMA_DSCRB_OPTIONS(K_DMA_ETHTX_APPENDCRC_APPENDPAD) |
 		V_DMA_DSCRB_PKT_SIZE(length);
-
-	/*
-	 * fill in the context
-	 */
-
+
+	/*
+	 * fill in the context
+	 */
+
 	d->sbdma_ctxtable[dsc-d->sbdma_dscrtable] = sb;
-
-	/*
-	 * point at next packet
-	 */
-
+
+	/*
+	 * point at next packet
+	 */
+
 	d->sbdma_addptr = nextdsc;
-
-	/*
+
+	/*
 	 * Give the buffer to the DMA engine.
 	 */
-
+
 	__raw_writeq(1, d->sbdma_dscrcnt);
-
+
 	return 0;					/* we did it */
 }

@@ -1063,12 +1063,12 @@

 /**********************************************************************
  *  SBDMA_EMPTYRING(d)
- *
+ *
  *  Free all allocated sk_buffs on the specified DMA channel;
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   d  - DMA channel
- *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
@@ -1077,7 +1077,7 @@
 {
 	int idx;
 	struct sk_buff *sb;
-
+
 	for (idx = 0; idx < d->sbdma_maxdescr; idx++) {
 		sb = d->sbdma_ctxtable[idx];
 		if (sb) {
@@ -1090,13 +1090,13 @@

 /**********************************************************************
  *  SBDMA_FILLRING(d)
- *
+ *
  *  Fill the specified DMA channel (must be receive channel)
  *  with sk_buffs
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   d - DMA channel
- *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
@@ -1104,7 +1104,7 @@
 static void sbdma_fillring(sbmacdma_t *d)
 {
 	int idx;
-
+
 	for (idx = 0; idx < SBMAC_MAX_RXDESCR-1; idx++) {
 		if (sbdma_add_rcvbuffer(d,NULL) != 0)
 			break;
@@ -1114,16 +1114,16 @@

 /**********************************************************************
  *  SBDMA_RX_PROCESS(sc,d)
- *
- *  Process "completed" receive buffers on the specified DMA channel.
+ *
+ *  Process "completed" receive buffers on the specified DMA channel.
  *  Note that this isn't really ideal for priority channels, since
- *  it processes all of the packets on a given channel before
- *  returning.
- *
- *  Input parameters:
+ *  it processes all of the packets on a given channel before
+ *  returning.
+ *
+ *  Input parameters:
  *	   sc - softc structure
  *  	   d - DMA channel context
- *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
@@ -1135,56 +1135,56 @@
 	sbdmadscr_t *dsc;
 	struct sk_buff *sb;
 	int len;
-
+
 	for (;;) {
-		/*
+		/*
 		 * figure out where we are (as an index) and where
 		 * the hardware is (also as an index)
 		 *
-		 * This could be done faster if (for example) the
+		 * This could be done faster if (for example) the
 		 * descriptor table was page-aligned and contiguous in
 		 * both virtual and physical memory -- you could then
 		 * just compare the low-order bits of the virtual address
 		 * (sbdma_remptr) and the physical address (sbdma_curdscr CSR)
 		 */
-
+
 		curidx = d->sbdma_remptr - d->sbdma_dscrtable;
 		hwidx = (int) (((__raw_readq(d->sbdma_curdscr) & M_DMA_CURDSCR_ADDR) -
 				d->sbdma_dscrtable_phys) / sizeof(sbdmadscr_t));
-
+
 		/*
 		 * If they're the same, that means we've processed all
 		 * of the descriptors up to (but not including) the one that
 		 * the hardware is working on right now.
 		 */
-
+
 		if (curidx == hwidx)
 			break;
-
+
 		/*
 		 * Otherwise, get the packet's sk_buff ptr back
 		 */
-
+
 		dsc = &(d->sbdma_dscrtable[curidx]);
 		sb = d->sbdma_ctxtable[curidx];
 		d->sbdma_ctxtable[curidx] = NULL;
-
+
 		len = (int)G_DMA_DSCRB_PKT_SIZE(dsc->dscr_b) - 4;
-
+
 		/*
 		 * Check packet status.  If good, process it.
 		 * If not, silently drop it and put it back on the
 		 * receive ring.
 		 */
-
+
 		if (!(dsc->dscr_a & M_DMA_ETHRX_BAD)) {
-
+
 			/*
 			 * Add a new buffer to replace the old one.  If we fail
 			 * to allocate a buffer, we're going to drop this
 			 * packet and put it right back on the receive ring.
 			 */
-
+
 			if (sbdma_add_rcvbuffer(d,NULL) == -ENOBUFS) {
 				sc->sbm_stats.rx_dropped++;
 				sbdma_add_rcvbuffer(d,sb); /* re-add old buffer */
@@ -1193,7 +1193,7 @@
 				 * Set length into the packet
 				 */
 				skb_put(sb,len);
-
+
 				/*
 				 * Buffer has been replaced on the
 				 * receive ring.  Pass the buffer to
@@ -1212,7 +1212,7 @@
 						sb->ip_summed = CHECKSUM_NONE;
 					}
 				}
-
+
 				netif_rx(sb);
 			}
 		} else {
@@ -1223,14 +1223,14 @@
 			sc->sbm_stats.rx_errors++;
 			sbdma_add_rcvbuffer(d,sb);
 		}
-
-
-		/*
+
+
+		/*
 		 * .. and advance to the next buffer.
 		 */
-
+
 		d->sbdma_remptr = SBDMA_NEXTBUF(d,sbdma_remptr);
-
+
 	}
 }

@@ -1238,17 +1238,17 @@

 /**********************************************************************
  *  SBDMA_TX_PROCESS(sc,d)
- *
- *  Process "completed" transmit buffers on the specified DMA channel.
+ *
+ *  Process "completed" transmit buffers on the specified DMA channel.
  *  This is normally called within the interrupt service routine.
  *  Note that this isn't really ideal for priority channels, since
- *  it processes all of the packets on a given channel before
- *  returning.
- *
- *  Input parameters:
+ *  it processes all of the packets on a given channel before
+ *  returning.
+ *
+ *  Input parameters:
  *      sc - softc structure
  *  	   d - DMA channel context
- *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
@@ -1262,19 +1262,19 @@
 	unsigned long flags;

 	spin_lock_irqsave(&(sc->sbm_lock), flags);
-
+
 	for (;;) {
-		/*
+		/*
 		 * figure out where we are (as an index) and where
 		 * the hardware is (also as an index)
 		 *
-		 * This could be done faster if (for example) the
+		 * This could be done faster if (for example) the
 		 * descriptor table was page-aligned and contiguous in
 		 * both virtual and physical memory -- you could then
 		 * just compare the low-order bits of the virtual address
 		 * (sbdma_remptr) and the physical address (sbdma_curdscr CSR)
 		 */
-
+
 		curidx = d->sbdma_remptr - d->sbdma_dscrtable;
 		hwidx = (int) (((__raw_readq(d->sbdma_curdscr) & M_DMA_CURDSCR_ADDR) -
 				d->sbdma_dscrtable_phys) / sizeof(sbdmadscr_t));
@@ -1284,75 +1284,75 @@
 		 * of the descriptors up to (but not including) the one that
 		 * the hardware is working on right now.
 		 */
-
+
 		if (curidx == hwidx)
 			break;
-
+
 		/*
 		 * Otherwise, get the packet's sk_buff ptr back
 		 */
-
+
 		dsc = &(d->sbdma_dscrtable[curidx]);
 		sb = d->sbdma_ctxtable[curidx];
 		d->sbdma_ctxtable[curidx] = NULL;
-
+
 		/*
 		 * Stats
 		 */
-
+
 		sc->sbm_stats.tx_bytes += sb->len;
 		sc->sbm_stats.tx_packets++;
-
+
 		/*
 		 * for transmits, we just free buffers.
 		 */
-
+
 		dev_kfree_skb_irq(sb);
-
-		/*
+
+		/*
 		 * .. and advance to the next buffer.
 		 */

 		d->sbdma_remptr = SBDMA_NEXTBUF(d,sbdma_remptr);
-
-	}
-
+
+	}
+
 	/*
 	 * Decide if we should wake up the protocol or not.
 	 * Other drivers seem to do this when we reach a low
 	 * watermark on the transmit queue.
 	 */
-
+
 	netif_wake_queue(d->sbdma_eth->sbm_dev);
-
+
 	spin_unlock_irqrestore(&(sc->sbm_lock), flags);
-
+
 }

 /**********************************************************************
  *  SBMAC_INITCTX(s)
- *
+ *
  *  Initialize an Ethernet context structure - this is called
  *  once per MAC on the 1250.  Memory is allocated here, so don't
  *  call it again from inside the ioctl routines that bring the
  *  interface up/down
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   s - sbmac context structure
- *
+ *
  *  Return value:
  *  	   0
  ********************************************************************* */

 static int sbmac_initctx(struct sbmac_softc *s)
 {
-
-	/*
-	 * figure out the addresses of some ports
-	 */
-
+
+	/*
+	 * figure out the addresses of some ports
+	 */
+
 	s->sbm_macenable = s->sbm_base + R_MAC_ENABLE;
 	s->sbm_maccfg    = s->sbm_base + R_MAC_CFG;
 	s->sbm_fifocfg   = s->sbm_base + R_MAC_THRSH_CFG;
@@ -1369,29 +1369,29 @@
 	s->sbm_phy_oldanlpar = 0;
 	s->sbm_phy_oldk1stsr = 0;
 	s->sbm_phy_oldlinkstat = 0;
-
+
 	/*
 	 * Initialize the DMA channels.  Right now, only one per MAC is used
 	 * Note: Only do this _once_, as it allocates memory from the kernel!
 	 */
-
+
 	sbdma_initctx(&(s->sbm_txdma),s,0,DMA_TX,SBMAC_MAX_TXDESCR);
 	sbdma_initctx(&(s->sbm_rxdma),s,0,DMA_RX,SBMAC_MAX_RXDESCR);
-
+
 	/*
 	 * initial state is OFF
 	 */
-
+
 	s->sbm_state = sbmac_state_off;
-
+
 	/*
 	 * Initial speed is (XXX TEMP) 10MBit/s HDX no FC
 	 */
-
+
 	s->sbm_speed = sbmac_speed_10;
 	s->sbm_duplex = sbmac_duplex_half;
 	s->sbm_fc = sbmac_fc_disabled;
-
+
 	return 0;
 }

@@ -1402,7 +1402,7 @@
 		kfree(d->sbdma_dscrtable);
 		d->sbdma_dscrtable = NULL;
 	}
-
+
 	if (d->sbdma_ctxtable) {
 		kfree(d->sbdma_ctxtable);
 		d->sbdma_ctxtable = NULL;
@@ -1419,12 +1419,12 @@

 /**********************************************************************
  *  SBMAC_CHANNEL_START(s)
- *
+ *
  *  Start packet processing on this MAC.
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   s - sbmac structure
- *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
@@ -1435,46 +1435,46 @@
 	volatile void __iomem *port;
 	uint64_t cfg,fifo,framecfg;
 	int idx, th_value;
-
+
 	/*
 	 * Don't do this if running
 	 */

 	if (s->sbm_state == sbmac_state_on)
 		return;
-
+
 	/*
 	 * Bring the controller out of reset, but leave it off.
 	 */
-
+
 	__raw_writeq(0, s->sbm_macenable);
-
+
 	/*
 	 * Ignore all received packets
 	 */
-
+
 	__raw_writeq(0, s->sbm_rxfilter);
-
-	/*
+
+	/*
 	 * Calculate values for various control registers.
 	 */
-
+
 	cfg = M_MAC_RETRY_EN |
-		M_MAC_TX_HOLD_SOP_EN |
+		M_MAC_TX_HOLD_SOP_EN |
 		V_MAC_TX_PAUSE_CNT_16K |
 		M_MAC_AP_STAT_EN |
 		M_MAC_FAST_SYNC |
 		M_MAC_SS_EN |
 		0;
-
-	/*
+
+	/*
 	 * Be sure that RD_THRSH+WR_THRSH <= 32 for pass1 pars
 	 * and make sure that RD_THRSH + WR_THRSH <=128 for pass2 and above
 	 * Use a larger RD_THRSH for gigabit
 	 */
-	if (periph_rev >= 2)
+	if (periph_rev >= 2)
 		th_value = 64;
-	else
+	else
 		th_value = 28;

 	fifo = V_MAC_TX_WR_THRSH(4) |	/* Must be '4' or '8' */
@@ -1492,29 +1492,29 @@
 		V_MAC_BACKOFF_SEL(1);

 	/*
-	 * Clear out the hash address map
-	 */
-
+	 * Clear out the hash address map
+	 */
+
 	port = s->sbm_base + R_MAC_HASH_BASE;
 	for (idx = 0; idx < MAC_HASH_COUNT; idx++) {
 		__raw_writeq(0, port);
 		port += sizeof(uint64_t);
 	}
-
+
 	/*
 	 * Clear out the exact-match table
 	 */
-
+
 	port = s->sbm_base + R_MAC_ADDR_BASE;
 	for (idx = 0; idx < MAC_ADDR_COUNT; idx++) {
 		__raw_writeq(0, port);
 		port += sizeof(uint64_t);
 	}
-
+
 	/*
 	 * Clear out the DMA Channel mapping table registers
 	 */
-
+
 	port = s->sbm_base + R_MAC_CHUP0_BASE;
 	for (idx = 0; idx < MAC_CHMAP_COUNT; idx++) {
 		__raw_writeq(0, port);
@@ -1527,14 +1527,14 @@
 		__raw_writeq(0, port);
 		port += sizeof(uint64_t);
 	}
-
+
 	/*
 	 * Program the hardware address.  It goes into the hardware-address
 	 * register as well as the first filter register.
 	 */
-
+
 	reg = sbmac_addr2reg(s->sbm_hwaddr);
-
+
 	port = s->sbm_base + R_MAC_ADDR_BASE;
 	__raw_writeq(reg, port);
 	port = s->sbm_base + R_MAC_ETHERNET_ADDR;
@@ -1549,48 +1549,48 @@
 #else
 	__raw_writeq(reg, port);
 #endif
-
+
 	/*
 	 * Set the receive filter for no packets, and write values
 	 * to the various config registers
 	 */
-
+
 	__raw_writeq(0, s->sbm_rxfilter);
 	__raw_writeq(0, s->sbm_imr);
 	__raw_writeq(framecfg, s->sbm_framecfg);
 	__raw_writeq(fifo, s->sbm_fifocfg);
 	__raw_writeq(cfg, s->sbm_maccfg);
-
+
 	/*
 	 * Initialize DMA channels (rings should be ok now)
 	 */
-
+
 	sbdma_channel_start(&(s->sbm_rxdma), DMA_RX);
 	sbdma_channel_start(&(s->sbm_txdma), DMA_TX);
-
+
 	/*
 	 * Configure the speed, duplex, and flow control
 	 */

 	sbmac_set_speed(s,s->sbm_speed);
 	sbmac_set_duplex(s,s->sbm_duplex,s->sbm_fc);
-
+
 	/*
 	 * Fill the receive ring
 	 */
-
+
 	sbdma_fillring(&(s->sbm_rxdma));
-
-	/*
+
+	/*
 	 * Turn on the rest of the bits in the enable register
-	 */
-
+	 */
+
 	__raw_writeq(M_MAC_RXDMA_EN0 |
 		       M_MAC_TXDMA_EN0 |
 		       M_MAC_RX_ENABLE |
 		       M_MAC_TX_ENABLE, s->sbm_macenable);
-
-
+
+

 #ifdef CONFIG_SBMAC_COALESCE
@@ -1606,44 +1606,44 @@
 	__raw_writeq((M_MAC_INT_CHANNEL << S_MAC_TX_CH0) |
 		       (M_MAC_INT_CHANNEL << S_MAC_RX_CH0), s->sbm_imr);
 #endif
-
-	/*
-	 * Enable receiving unicasts and broadcasts
-	 */
-
+
+	/*
+	 * Enable receiving unicasts and broadcasts
+	 */
+
 	__raw_writeq(M_MAC_UCAST_EN | M_MAC_BCAST_EN, s->sbm_rxfilter);
-
-	/*
-	 * we're running now.
-	 */
-
+
+	/*
+	 * we're running now.
+	 */
+
 	s->sbm_state = sbmac_state_on;
-
-	/*
-	 * Program multicast addresses
-	 */
-
+
+	/*
+	 * Program multicast addresses
+	 */
+
 	sbmac_setmulti(s);
-
-	/*
-	 * If channel was in promiscuous mode before, turn that on
-	 */
-
+
+	/*
+	 * If channel was in promiscuous mode before, turn that on
+	 */
+
 	if (s->sbm_devflags & IFF_PROMISC) {
 		sbmac_promiscuous_mode(s,1);
 	}
-
+
 }

 /**********************************************************************
  *  SBMAC_CHANNEL_STOP(s)
- *
+ *
  *  Stop packet processing on this MAC.
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   s - sbmac structure
- *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
@@ -1651,49 +1651,49 @@
 static void sbmac_channel_stop(struct sbmac_softc *s)
 {
 	/* don't do this if already stopped */
-
+
 	if (s->sbm_state == sbmac_state_off)
 		return;
-
+
 	/* don't accept any packets, disable all interrupts */
-
+
 	__raw_writeq(0, s->sbm_rxfilter);
 	__raw_writeq(0, s->sbm_imr);
-
+
 	/* Turn off ticker */
-
+
 	/* XXX */
-
+
 	/* turn off receiver and transmitter */
-
+
 	__raw_writeq(0, s->sbm_macenable);
-
+
 	/* We're stopped now. */
-
+
 	s->sbm_state = sbmac_state_off;
-
+
 	/*
 	 * Stop DMA channels (rings should be ok now)
 	 */
-
+
 	sbdma_channel_stop(&(s->sbm_rxdma));
 	sbdma_channel_stop(&(s->sbm_txdma));
-
+
 	/* Empty the receive and transmit rings */
-
+
 	sbdma_emptyring(&(s->sbm_rxdma));
 	sbdma_emptyring(&(s->sbm_txdma));
-
+
 }

 /**********************************************************************
  *  SBMAC_SET_CHANNEL_STATE(state)
- *
+ *
  *  Set the channel's state ON or OFF
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   state - new state
- *
+ *
  *  Return value:
  *  	   old state
  ********************************************************************* */
@@ -1701,43 +1701,43 @@
 					     sbmac_state_t state)
 {
 	sbmac_state_t oldstate = sc->sbm_state;
-
+
 	/*
 	 * If same as previous state, return
 	 */
-
+
 	if (state == oldstate) {
 		return oldstate;
 	}
-
-	/*
-	 * If new state is ON, turn channel on
-	 */
-
+
+	/*
+	 * If new state is ON, turn channel on
+	 */
+
 	if (state == sbmac_state_on) {
 		sbmac_channel_start(sc);
 	}
 	else {
 		sbmac_channel_stop(sc);
 	}
-
+
 	/*
 	 * Return previous state
 	 */
-
+
 	return oldstate;
 }

 /**********************************************************************
  *  SBMAC_PROMISCUOUS_MODE(sc,onoff)
- *
+ *
  *  Turn on or off promiscuous mode
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   sc - softc
  *      onoff - 1 to turn on, 0 to turn off
- *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
@@ -1745,15 +1745,15 @@
 static void sbmac_promiscuous_mode(struct sbmac_softc *sc,int onoff)
 {
 	uint64_t reg;
-
+
 	if (sc->sbm_state != sbmac_state_on)
 		return;
-
+
 	if (onoff) {
 		reg = __raw_readq(sc->sbm_rxfilter);
 		reg |= M_MAC_ALLPKT_EN;
 		__raw_writeq(reg, sc->sbm_rxfilter);
-	}
+	}
 	else {
 		reg = __raw_readq(sc->sbm_rxfilter);
 		reg &= ~M_MAC_ALLPKT_EN;
@@ -1763,12 +1763,12 @@

 /**********************************************************************
  *  SBMAC_SETIPHDR_OFFSET(sc,onoff)
- *
+ *
  *  Set the iphdr offset as 15 assuming ethernet encapsulation
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   sc - softc
- *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
@@ -1776,12 +1776,12 @@
 static void sbmac_set_iphdr_offset(struct sbmac_softc *sc)
 {
 	uint64_t reg;
-
+
 	/* Hard code the off set to 15 for now */
 	reg = __raw_readq(sc->sbm_rxfilter);
 	reg &= ~M_MAC_IPHDR_OFFSET | V_MAC_IPHDR_OFFSET(15);
 	__raw_writeq(reg, sc->sbm_rxfilter);
-
+
 	/* read system identification to determine revision */
 	if (periph_rev >= 2) {
 		sc->rx_hw_checksum = ENABLE;
@@ -1793,13 +1793,13 @@

 /**********************************************************************
  *  SBMAC_ADDR2REG(ptr)
- *
+ *
  *  Convert six bytes into the 64-bit register value that
  *  we typically write into the SBMAC's address/mcast registers
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   ptr - pointer to 6 bytes
- *
+ *
  *  Return value:
  *  	   register value
  ********************************************************************* */
@@ -1807,35 +1807,35 @@
 static uint64_t sbmac_addr2reg(unsigned char *ptr)
 {
 	uint64_t reg = 0;
-
+
 	ptr += 6;
-
-	reg |= (uint64_t) *(--ptr);
+
+	reg |= (uint64_t) *(--ptr);
 	reg <<= 8;
-	reg |= (uint64_t) *(--ptr);
+	reg |= (uint64_t) *(--ptr);
 	reg <<= 8;
-	reg |= (uint64_t) *(--ptr);
+	reg |= (uint64_t) *(--ptr);
 	reg <<= 8;
-	reg |= (uint64_t) *(--ptr);
+	reg |= (uint64_t) *(--ptr);
 	reg <<= 8;
-	reg |= (uint64_t) *(--ptr);
+	reg |= (uint64_t) *(--ptr);
 	reg <<= 8;
-	reg |= (uint64_t) *(--ptr);
-
+	reg |= (uint64_t) *(--ptr);
+
 	return reg;
 }

 /**********************************************************************
  *  SBMAC_SET_SPEED(s,speed)
- *
+ *
  *  Configure LAN speed for the specified MAC.
  *  Warning: must be called when MAC is off!
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   s - sbmac structure
  *  	   speed - speed to set MAC to (see sbmac_speed_t enum)
- *
+ *
  *  Return value:
  *  	   1 if successful
  *      0 indicates invalid parameters
@@ -1849,31 +1849,31 @@
 	/*
 	 * Save new current values
 	 */
-
+
 	s->sbm_speed = speed;
-
+
 	if (s->sbm_state == sbmac_state_on)
 		return 0;	/* save for next restart */

 	/*
-	 * Read current register values
-	 */
-
+	 * Read current register values
+	 */
+
 	cfg = __raw_readq(s->sbm_maccfg);
 	framecfg = __raw_readq(s->sbm_framecfg);
-
+
 	/*
 	 * Mask out the stuff we want to change
 	 */
-
+
 	cfg &= ~(M_MAC_BURST_EN | M_MAC_SPEED_SEL);
 	framecfg &= ~(M_MAC_IFG_RX | M_MAC_IFG_TX | M_MAC_IFG_THRSH |
 		      M_MAC_SLOT_SIZE);
-
+
 	/*
 	 * Now add in the new bits
 	 */
-
+
 	switch (speed) {
 	case sbmac_speed_10:
 		framecfg |= V_MAC_IFG_RX_10 |
@@ -1882,7 +1882,7 @@
 			V_MAC_SLOT_SIZE_10;
 		cfg |= V_MAC_SPEED_SEL_10MBPS;
 		break;
-
+
 	case sbmac_speed_100:
 		framecfg |= V_MAC_IFG_RX_100 |
 			V_MAC_IFG_TX_100 |
@@ -1890,7 +1890,7 @@
 			V_MAC_SLOT_SIZE_100;
 		cfg |= V_MAC_SPEED_SEL_100MBPS ;
 		break;
-
+
 	case sbmac_speed_1000:
 		framecfg |= V_MAC_IFG_RX_1000 |
 			V_MAC_IFG_TX_1000 |
@@ -1898,34 +1898,34 @@
 			V_MAC_SLOT_SIZE_1000;
 		cfg |= V_MAC_SPEED_SEL_1000MBPS | M_MAC_BURST_EN;
 		break;
-
+
 	case sbmac_speed_auto:		/* XXX not implemented */
 		/* fall through */
 	default:
 		return 0;
 	}
-
-	/*
-	 * Send the bits back to the hardware
-	 */
-
+
+	/*
+	 * Send the bits back to the hardware
+	 */
+
 	__raw_writeq(framecfg, s->sbm_framecfg);
 	__raw_writeq(cfg, s->sbm_maccfg);
-
+
 	return 1;
 }

 /**********************************************************************
  *  SBMAC_SET_DUPLEX(s,duplex,fc)
- *
+ *
  *  Set Ethernet duplex and flow control options for this MAC
  *  Warning: must be called when MAC is off!
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   s - sbmac structure
  *  	   duplex - duplex setting (see sbmac_duplex_t)
  *  	   fc - flow control setting (see sbmac_fc_t)
- *
+ *
  *  Return value:
  *  	   1 if ok
  *  	   0 if an invalid parameter combination was specified
@@ -1934,67 +1934,67 @@
 static int sbmac_set_duplex(struct sbmac_softc *s,sbmac_duplex_t duplex,sbmac_fc_t fc)
 {
 	uint64_t cfg;
-
+
 	/*
 	 * Save new current values
 	 */
-
+
 	s->sbm_duplex = duplex;
 	s->sbm_fc = fc;
-
+
 	if (s->sbm_state == sbmac_state_on)
 		return 0;	/* save for next restart */
-
-	/*
-	 * Read current register values
-	 */
-
+
+	/*
+	 * Read current register values
+	 */
+
 	cfg = __raw_readq(s->sbm_maccfg);
-
+
 	/*
 	 * Mask off the stuff we're about to change
 	 */
-
+
 	cfg &= ~(M_MAC_FC_SEL | M_MAC_FC_CMD | M_MAC_HDX_EN);
-
-
+
+
 	switch (duplex) {
 	case sbmac_duplex_half:
 		switch (fc) {
 		case sbmac_fc_disabled:
 			cfg |= M_MAC_HDX_EN | V_MAC_FC_CMD_DISABLED;
 			break;
-
+
 		case sbmac_fc_collision:
 			cfg |= M_MAC_HDX_EN | V_MAC_FC_CMD_ENABLED;
 			break;
-
+
 		case sbmac_fc_carrier:
 			cfg |= M_MAC_HDX_EN | V_MAC_FC_CMD_ENAB_FALSECARR;
 			break;
-
+
 		case sbmac_fc_auto:		/* XXX not implemented */
-			/* fall through */
+			/* fall through */
 		case sbmac_fc_frame:		/* not valid in half duplex */
 		default:			/* invalid selection */
 			return 0;
 		}
 		break;
-
+
 	case sbmac_duplex_full:
 		switch (fc) {
 		case sbmac_fc_disabled:
 			cfg |= V_MAC_FC_CMD_DISABLED;
 			break;
-
+
 		case sbmac_fc_frame:
 			cfg |= V_MAC_FC_CMD_ENABLED;
 			break;
-
+
 		case sbmac_fc_collision:	/* not valid in full duplex */
 		case sbmac_fc_carrier:		/* not valid in full duplex */
 		case sbmac_fc_auto:		/* XXX not implemented */
-			/* fall through */
+			/* fall through */
 		default:
 			return 0;
 		}
@@ -2003,13 +2003,13 @@
 		/* XXX not implemented */
 		break;
 	}
-
-	/*
-	 * Send the bits back to the hardware
-	 */
-
+
+	/*
+	 * Send the bits back to the hardware
+	 */
+
 	__raw_writeq(cfg, s->sbm_maccfg);
-
+
 	return 1;
 }

@@ -2018,12 +2018,12 @@

 /**********************************************************************
  *  SBMAC_INTR()
- *
+ *
  *  Interrupt handler for MAC interrupts
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   MAC structure
- *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
@@ -2035,27 +2035,27 @@
 	int handled = 0;

 	for (;;) {
-
+
 		/*
 		 * Read the ISR (this clears the bits in the real
 		 * register, except for counter addr)
 		 */
-
+
 		isr = __raw_readq(sc->sbm_isr) & ~M_MAC_COUNTER_ADDR;
-
+
 		if (isr == 0)
 			break;

 		handled = 1;
-
+
 		/*
 		 * Transmits on channel 0
 		 */
-
+
 		if (isr & (M_MAC_INT_CHANNEL << S_MAC_TX_CH0)) {
 			sbdma_tx_process(sc,&(sc->sbm_txdma));
 		}
-
+
 		/*
 		 * Receives on channel 0
 		 */
@@ -2075,8 +2075,8 @@
 		 * EOP_SEEN here takes care of this case.
 		 * (EOP_SEEN is part of M_MAC_INT_CHANNEL << S_MAC_RX_CH0)
 		 */
-
-
+
+
 		if (isr & (M_MAC_INT_CHANNEL << S_MAC_RX_CH0)) {
 			sbdma_rx_process(sc,&(sc->sbm_rxdma));
 		}
@@ -2087,29 +2087,29 @@

 /**********************************************************************
  *  SBMAC_START_TX(skb,dev)
- *
- *  Start output on the specified interface.  Basically, we
+ *
+ *  Start output on the specified interface.  Basically, we
  *  queue as many buffers as we can until the ring fills up, or
  *  we run off the end of the queue, whichever comes first.
- *
- *  Input parameters:
- *
- *
+ *
+ *  Input parameters:
+ *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
 static int sbmac_start_tx(struct sk_buff *skb, struct net_device *dev)
 {
 	struct sbmac_softc *sc = netdev_priv(dev);
-
+
 	/* lock eth irq */
 	spin_lock_irq (&sc->sbm_lock);
-
-	/*
-	 * Put the buffer on the transmit ring.  If we
+
+	/*
+	 * Put the buffer on the transmit ring.  If we
 	 * don't have room, stop the queue.
 	 */
-
+
 	if (sbdma_add_txbuffer(&(sc->sbm_txdma),skb)) {
 		/* XXX save skb that we could not send */
 		netif_stop_queue(dev);
@@ -2117,24 +2117,24 @@

 		return 1;
 	}
-
+
 	dev->trans_start = jiffies;
-
+
 	spin_unlock_irq (&sc->sbm_lock);
-
+
 	return 0;
 }

 /**********************************************************************
  *  SBMAC_SETMULTI(sc)
- *
+ *
  *  Reprogram the multicast table into the hardware, given
  *  the list of multicasts associated with the interface
  *  structure.
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   sc - softc
- *
+ *
  *  Return value:
  *  	   nothing
  ********************************************************************* */
@@ -2146,52 +2146,52 @@
 	int idx;
 	struct dev_mc_list *mclist;
 	struct net_device *dev = sc->sbm_dev;
-
-	/*
+
+	/*
 	 * Clear out entire multicast table.  We do this by nuking
 	 * the entire hash table and all the direct matches except
-	 * the first one, which is used for our station address
-	 */
-
+	 * the first one, which is used for our station address
+	 */
+
 	for (idx = 1; idx < MAC_ADDR_COUNT; idx++) {
 		port = sc->sbm_base + R_MAC_ADDR_BASE+(idx*sizeof(uint64_t));
 		__raw_writeq(0, port);
 	}
-
+
 	for (idx = 0; idx < MAC_HASH_COUNT; idx++) {
 		port = sc->sbm_base + R_MAC_HASH_BASE+(idx*sizeof(uint64_t));
 		__raw_writeq(0, port);
 	}
-
+
 	/*
 	 * Clear the filter to say we don't want any multicasts.
 	 */
-
+
 	reg = __raw_readq(sc->sbm_rxfilter);
 	reg &= ~(M_MAC_MCAST_INV | M_MAC_MCAST_EN);
 	__raw_writeq(reg, sc->sbm_rxfilter);
-
+
 	if (dev->flags & IFF_ALLMULTI) {
-		/*
-		 * Enable ALL multicasts.  Do this by inverting the
-		 * multicast enable bit.
+		/*
+		 * Enable ALL multicasts.  Do this by inverting the
+		 * multicast enable bit.
 		 */
 		reg = __raw_readq(sc->sbm_rxfilter);
 		reg |= (M_MAC_MCAST_INV | M_MAC_MCAST_EN);
 		__raw_writeq(reg, sc->sbm_rxfilter);
 		return;
 	}
-
-
-	/*
+
+
+	/*
 	 * Progam new multicast entries.  For now, only use the
 	 * perfect filter.  In the future we'll need to use the
 	 * hash filter if the perfect filter overflows
 	 */
-
+
 	/* XXX only using perfect filter for now, need to use hash
 	 * XXX if the table overflows */
-
+
 	idx = 1;		/* skip station address */
 	mclist = dev->mc_list;
 	while (mclist && (idx < MAC_ADDR_COUNT)) {
@@ -2201,12 +2201,12 @@
 		idx++;
 		mclist = mclist->next;
 	}
-
-	/*
+
+	/*
 	 * Enable the "accept multicast bits" if we programmed at least one
-	 * multicast.
-	 */
-
+	 * multicast.
+	 */
+
 	if (idx > 1) {
 		reg = __raw_readq(sc->sbm_rxfilter);
 		reg |= M_MAC_MCAST_EN;
@@ -2219,12 +2219,12 @@
 #if defined(SBMAC_ETH0_HWADDR) || defined(SBMAC_ETH1_HWADDR) || defined(SBMAC_ETH2_HWADDR)
 /**********************************************************************
  *  SBMAC_PARSE_XDIGIT(str)
- *
+ *
  *  Parse a hex digit, returning its value
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   str - character
- *
+ *
  *  Return value:
  *  	   hex value, or -1 if invalid
  ********************************************************************* */
@@ -2232,7 +2232,7 @@
 static int sbmac_parse_xdigit(char str)
 {
 	int digit;
-
+
 	if ((str >= '0') && (str <= '9'))
 		digit = str - '0';
 	else if ((str >= 'a') && (str <= 'f'))
@@ -2241,20 +2241,20 @@
 		digit = str - 'A' + 10;
 	else
 		return -1;
-
+
 	return digit;
 }

 /**********************************************************************
  *  SBMAC_PARSE_HWADDR(str,hwaddr)
- *
+ *
  *  Convert a string in the form xx:xx:xx:xx:xx:xx into a 6-byte
  *  Ethernet address.
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   str - string
  *  	   hwaddr - pointer to hardware address
- *
+ *
  *  Return value:
  *  	   0 if ok, else -1
  ********************************************************************* */
@@ -2263,7 +2263,7 @@
 {
 	int digit1,digit2;
 	int idx = 6;
-
+
 	while (*str && (idx > 0)) {
 		digit1 = sbmac_parse_xdigit(*str);
 		if (digit1 < 0)
@@ -2271,7 +2271,7 @@
 		str++;
 		if (!*str)
 			return -1;
-
+
 		if ((*str == ':') || (*str == '-')) {
 			digit2 = digit1;
 			digit1 = 0;
@@ -2282,10 +2282,10 @@
 				return -1;
 			str++;
 		}
-
+
 		*hwaddr++ = (digit1 << 4) | digit2;
 		idx--;
-
+
 		if (*str == '-')
 			str++;
 		if (*str == ':')
@@ -2306,12 +2306,12 @@

 /**********************************************************************
  *  SBMAC_INIT(dev)
- *
+ *
  *  Attach routine - init hardware and hook ourselves into linux
- *
- *  Input parameters:
+ *
+ *  Input parameters:
  *  	   dev - net_device structure
- *
+ *
  *  Return value:
  *  	   status
  ********************************************************************* */
@@ -2323,53 +2323,53 @@
 	uint64_t ea_reg;
 	int i;
 	int err;
-
+
 	sc = netdev_priv(dev);
-
+
 	/* Determine controller base address */
-
+
 	sc->sbm_base = IOADDR(dev->base_addr);
 	sc->sbm_dev = dev;
 	sc->sbe_idx = idx;
-
+
 	eaddr = sc->sbm_hwaddr;
-
-	/*
+
+	/*
 	 * Read the ethernet address.  The firwmare left this programmed
 	 * for us in the ethernet address register for each mac.
 	 */
-
+
 	ea_reg = __raw_readq(sc->sbm_base + R_MAC_ETHERNET_ADDR);
 	__raw_writeq(0, sc->sbm_base + R_MAC_ETHERNET_ADDR);
 	for (i = 0; i < 6; i++) {
 		eaddr[i] = (uint8_t) (ea_reg & 0xFF);
 		ea_reg >>= 8;
 	}
-
+
 	for (i = 0; i < 6; i++) {
 		dev->dev_addr[i] = eaddr[i];
 	}
-
-
-	/*
-	 * Init packet size
-	 */
-
+
+
+	/*
+	 * Init packet size
+	 */
+
 	sc->sbm_buffersize = ENET_PACKET_SIZE + SMP_CACHE_BYTES * 2 + ETHER_ALIGN;

-	/*
+	/*
 	 * Initialize context (get pointers to registers and stuff), then
 	 * allocate the memory for the descriptor tables.
 	 */
-
+
 	sbmac_initctx(sc);
-
+
 	/*
 	 * Set up Linux device callins
 	 */
-
+
 	spin_lock_init(&(sc->sbm_lock));
-
+
 	dev->open               = sbmac_open;
 	dev->hard_start_xmit    = sbmac_start_tx;
 	dev->stop               = sbmac_close;
@@ -2399,10 +2399,10 @@
 	 * was being displayed)
 	 */
 	printk(KERN_INFO
-	       "%s: SiByte Ethernet at 0x%08lX, address: %02X:%02X:%02X:%02X:%02X:%02X\n",
+	       "%s: SiByte Ethernet at 0x%08lX, address: %02X:%02X:%02X:%02X:%02X:%02X\n",
 	       dev->name, dev->base_addr,
 	       eaddr[0],eaddr[1],eaddr[2],eaddr[3],eaddr[4],eaddr[5]);
-
+

 	return 0;

@@ -2416,12 +2416,12 @@
 static int sbmac_open(struct net_device *dev)
 {
 	struct sbmac_softc *sc = netdev_priv(dev);
-
+
 	if (debug > 1) {
 		printk(KERN_DEBUG "%s: sbmac_open() irq %d.\n", dev->name, dev->irq);
 	}
-
-	/*
+
+	/*
 	 * map/route interrupt (clear status first, in case something
 	 * weird is pending; we haven't initialized the mac registers
 	 * yet)
@@ -2432,35 +2432,35 @@
 		return -EBUSY;

 	/*
-	 * Configure default speed
+	 * Configure default speed
 	 */

 	sbmac_mii_poll(sc,noisy_mii);
-
+
 	/*
 	 * Turn on the channel
 	 */

 	sbmac_set_channel_state(sc,sbmac_state_on);
-
+
 	/*
 	 * XXX Station address is in dev->dev_addr
 	 */
-
+
 	if (dev->if_port == 0)
-		dev->if_port = 0;
-
+		dev->if_port = 0;
+
 	netif_start_queue(dev);
-
+
 	sbmac_set_rx_mode(dev);
-
+
 	/* Set the timer to check for link beat. */
 	init_timer(&sc->sbm_timer);
 	sc->sbm_timer.expires = jiffies + 2 * HZ/100;
 	sc->sbm_timer.data = (unsigned long)dev;
 	sc->sbm_timer.function = &sbmac_timer;
 	add_timer(&sc->sbm_timer);
-
+
 	return 0;
 }

@@ -2578,20 +2578,20 @@
 	int mii_status;

 	spin_lock_irq (&sc->sbm_lock);
-
+
 	/* make IFF_RUNNING follow the MII status bit "Link established" */
 	mii_status = sbmac_mii_read(sc, sc->sbm_phys[0], MII_BMSR);
-
+
 	if ( (mii_status & BMSR_LINKSTAT) != (sc->sbm_phy_oldlinkstat) ) {
     	        sc->sbm_phy_oldlinkstat = mii_status & BMSR_LINKSTAT;
 		if (mii_status & BMSR_LINKSTAT) {
 			netif_carrier_on(dev);
 		}
 		else {
-			netif_carrier_off(dev);
+			netif_carrier_off(dev);
 		}
 	}
-
+
 	/*
 	 * Poll the PHY to see what speed we should be running at
 	 */
@@ -2609,9 +2609,9 @@
 			sbmac_channel_start(sc);
 		}
 	}
-
+
 	spin_unlock_irq (&sc->sbm_lock);
-
+
 	sc->sbm_timer.expires = jiffies + next_tick;
 	add_timer(&sc->sbm_timer);
 }
@@ -2620,13 +2620,13 @@
 static void sbmac_tx_timeout (struct net_device *dev)
 {
 	struct sbmac_softc *sc = netdev_priv(dev);
-
+
 	spin_lock_irq (&sc->sbm_lock);
-
-
+
+
 	dev->trans_start = jiffies;
 	sc->sbm_stats.tx_errors++;
-
+
 	spin_unlock_irq (&sc->sbm_lock);

 	printk (KERN_WARNING "%s: Transmit timed out\n",dev->name);
@@ -2639,13 +2639,13 @@
 {
 	struct sbmac_softc *sc = netdev_priv(dev);
 	unsigned long flags;
-
+
 	spin_lock_irqsave(&sc->sbm_lock, flags);
-
+
 	/* XXX update other stats here */
-
+
 	spin_unlock_irqrestore(&sc->sbm_lock, flags);
-
+
 	return &sc->sbm_stats;
 }

@@ -2662,8 +2662,8 @@
 		/*
 		 * Promiscuous changed.
 		 */
-
-		if (dev->flags & IFF_PROMISC) {
+
+		if (dev->flags & IFF_PROMISC) {
 			/* Unconditionally log net taps. */
 			msg_flag = 1;
 			sbmac_promiscuous_mode(sc,1);
@@ -2674,18 +2674,18 @@
 		}
 	}
 	spin_unlock_irqrestore(&sc->sbm_lock, flags);
-
+
 	if (msg_flag) {
 		printk(KERN_NOTICE "%s: Promiscuous mode %sabled.\n",
 		       dev->name,(msg_flag==1)?"en":"dis");
 	}
-
+
 	/*
 	 * Program the multicasts.  Do this every time.
 	 */
-
+
 	sbmac_setmulti(sc);
-
+
 }

 static int sbmac_mii_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
@@ -2694,10 +2694,10 @@
 	u16 *data = (u16 *)&rq->ifr_ifru;
 	unsigned long flags;
 	int retval;
-
+
 	spin_lock_irqsave(&sc->sbm_lock, flags);
 	retval = 0;
-
+
 	switch(cmd) {
 	case SIOCDEVPRIVATE:		/* Get the address of the PHY in use. */
 		data[0] = sc->sbm_phys[0] & 0x1f;
@@ -2719,7 +2719,7 @@
 	default:
 		retval = -EOPNOTSUPP;
 	}
-
+
 	spin_unlock_irqrestore(&sc->sbm_lock, flags);
 	return retval;
 }
@@ -2750,7 +2750,7 @@

 	sbdma_emptyring(&(sc->sbm_txdma));
 	sbdma_emptyring(&(sc->sbm_rxdma));
-
+
 	return 0;
 }

@@ -2781,7 +2781,7 @@
 	struct net_device *dev;
 	unsigned long port;
 	int chip_max_units;
-
+
 	/*
 	 * For bringup when not using the firmware, we can pre-fill
 	 * the MAC addresses using the environment variables
@@ -2827,7 +2827,7 @@

 	        port = A_MAC_CHANNEL_BASE(idx);

-		/*
+		/*
 		 * The R_MAC_ETHERNET_ADDR register will be set to some nonzero
 		 * value for us by the firmware if we're going to use this MAC.
 		 * If we find a zero, skip this MAC.
@@ -2845,7 +2845,7 @@
 		 */

 		dev = alloc_etherdev(sizeof(struct sbmac_softc));
-		if (!dev)
+		if (!dev)
 			return -ENOMEM;	/* return ENOMEM */

 		printk(KERN_DEBUG "sbmac: configuring MAC at %lx\n", port);


Spidernet: Rework RX linked list

Spidernet: Rework RX linked list

Make the hardware perceive the RX descriptor ring as a null-terminated linked
list, instead of a circular ring.

Signed-off-by: Linas Vepstas <ba5b7161287ad232d67ab9ebf53b27130547a421@austin.ibm.com>
Cc: James K Lewis <7b5df93f3e1d4983159f9c25b509a5017a16a078@us.ibm.com>
Cc: Arnd Bergmann <f2c659f01951776204a6c5b902787d9019fbeebd@arndb.de>
Signed-off-by: Andrew Morton <5c1e68b099950c134891f0b6e179498a8ebe9cf9@linux-foundation.org>
Signed-off-by: Jeff Garzik <f3e731dfa293c7a83119d8aacfa41b5d2d780be9@garzik.org>

--- drivers/net/spider_net.c
+++ drivers/net/spider_net.c
@@ -419,9 +419,13 @@
 		card->spider_stats.rx_iommu_map_error++;
 		descr->dmac_cmd_status = SPIDER_NET_DESCR_NOT_IN_USE;
 	} else {
+		descr->next_descr_addr = 0;
 		wmb();
 		descr->dmac_cmd_status = SPIDER_NET_DESCR_CARDOWNED |
 					 SPIDER_NET_DMAC_NOINTR_COMPLETE;
+
+		wmb();
+		descr->prev->next_descr_addr = descr->bus_addr;
 	}

 	return 0;
@@ -1650,7 +1654,6 @@
 spider_net_open(struct net_device *netdev)
 {
 	struct spider_net_card *card = netdev_priv(netdev);
-	struct spider_net_descr *descr;
 	int result;

 	result = spider_net_init_chain(card, &card->tx_chain);
@@ -1661,13 +1664,6 @@
 	result = spider_net_init_chain(card, &card->rx_chain);
 	if (result)
 		goto alloc_rx_failed;
-
-	/* Make a ring of of bus addresses */
-	descr = card->rx_chain.ring;
-	do {
-		descr->next_descr_addr = descr->next->bus_addr;
-		descr = descr->next;
-	} while (descr != card->rx_chain.ring);

 	/* Allocate rx skbs */
 	if (spider_net_alloc_rx_skbs(card))


Bug 749108 - Embedded inline images pretend message attachments

--- camel/camel-mime-message.c
+++ camel/camel-mime-message.c
@@ -1310,9 +1310,11 @@

 		*found = (cd->disposition && g_ascii_strcasecmp (cd->disposition, "attachment") == 0);

-		for (param = cd->params; param && !(*found); param = param->next) {
-			if (param->name && param->value && *param->value && g_ascii_strcasecmp (param->name, "filename") == 0)
-				*found = TRUE;
+		if (!*found && (!cd->disposition || g_ascii_strcasecmp (cd->disposition, "inline") != 0)) {
+			for (param = cd->params; param && !(*found); param = param->next) {
+				if (param->name && param->value && *param->value && g_ascii_strcasecmp (param->name, "filename") == 0)
+					*found = TRUE;
+			}
 		}
 	}


virtio_net: skb_orphan() and nf_reset() in xmit path.

The complex transmit free logic was introduced to avoid hangs on
removing the ip_conntrack module and also because drivers aren't
generally supposed to keep stale skbs for unbounded times.

After some debate, it was decided that while doing skb_orphan()
generally is a rat's nest, we can do it in this driver.  Following
patches take advantage of this.

Signed-off-by: Rusty Russell <df9728c9e5104131c08c7adb03af425394842596@rustcorp.com.au>

--- drivers/net/virtio_net.c
+++ drivers/net/virtio_net.c
@@ -528,8 +528,12 @@
 	num = skb_to_sgvec(skb, sg+1, 0, skb->len) + 1;

 	err = vi->svq->vq_ops->add_buf(vi->svq, sg, num, 0, skb);
-	if (err >= 0 && !vi->free_in_tasklet)
+	if (err >= 0 && !vi->free_in_tasklet) {
+		/* Don't wait up for transmitted skbs to be freed. */
+		skb_orphan(skb);
+		nf_reset(skb);
 		mod_timer(&vi->xmit_free_timer, jiffies + (HZ/10));
+	}

 	return err;
 }


tools/intel_dump_decode: use libdrm decoder

Signed-Off-by: Daniel Vetter <c1b6782c4af8f0673da8923a0702a1832e5940f4@ffwll.ch>

--- tools/intel_dump_decode.c
+++ tools/intel_dump_decode.c
@@ -35,10 +35,12 @@
 #include <fcntl.h>
 #include <getopt.h>

-#include "intel_decode.h"
+#include <intel_bufmgr.h>
+
+struct drm_intel_decode *ctx;

 static void
-read_bin_file(uint32_t devid, const char * filename)
+read_bin_file(const char * filename)
 {
 	uint32_t buf[16384];
 	int fd, offset, ret;
@@ -53,16 +55,19 @@
 		exit (1);
 	}

+	drm_intel_decode_set_dump_past_end(ctx, 1);
+
 	offset = 0;
 	while ((ret = read (fd, buf, sizeof(buf))) > 0) {
-		intel_decode (buf, ret/4, offset, devid, 1);
+		drm_intel_decode_set_batch_pointer(ctx, buf, offset, ret/4);
+		drm_intel_decode(ctx);
 		offset += ret;
 	}
 	close (fd);
 }

 static void
-read_data_file(uint32_t devid, const char * filename)
+read_data_file(const char * filename)
 {
     FILE *file;
     uint32_t *data = NULL;
@@ -108,7 +113,8 @@
     }

     if (count) {
-	intel_decode (data, count, gtt_offset, devid, 0);
+	drm_intel_decode_set_batch_pointer(ctx, data, gtt_offset, count);
+	drm_intel_decode(ctx);
     }

     free (data);
@@ -118,7 +124,7 @@
 }

 static void
-read_autodetect_file(uint32_t devid, const char * filename)
+read_autodetect_file(const char * filename)
 {
 	int binary = 0, c;
 	FILE *file;
@@ -141,9 +147,9 @@
 	fclose(file);

 	if (binary == 1)
-		read_bin_file(devid, filename);
+		read_bin_file(filename);
 	else
-		read_data_file(devid, filename);
+		read_data_file(filename);

 }

@@ -180,6 +186,8 @@
 		}
 	}

+	ctx = drm_intel_decode_context_alloc(devid);
+
 	if (optind == argc) {
 		fprintf(stderr, "no input file given\n");
 		exit(-1);
@@ -188,15 +196,15 @@
 	for (i = optind; i < argc; i++) {
 		/* For stdin input, let's read as data file */
 		if (!strcmp(argv[i], "-")) {
-			read_data_file(devid, argv[i]);
+			read_data_file(argv[i]);
 			continue;
 		}
 		if (binary == 1)
-			read_bin_file(devid, argv[i]);
+			read_bin_file(argv[i]);
 		else if (binary == 0)
-			read_data_file(devid, argv[i]);
+			read_data_file(argv[i]);
 		else
-			read_autodetect_file(devid, argv[i]);
+			read_autodetect_file(argv[i]);
 	}

 	return 0;


drivers/rtc/rtc-ab3100.c: remove empty function

After the switch to devm_ functions and the removal of
rtc_device_unregister(), the 'remove' function does not do anything.
Delete it.

Signed-off-by: Sachin Kamat <1c3b1584a6008857f36c03c58f657c0fc16fc09e@linaro.org>
Acked-by: Linus Walleij <9cd9d802d23c0ed5e224beabf4ae4a5c478746ef@linaro.org>
Signed-off-by: Andrew Morton <5c1e68b099950c134891f0b6e179498a8ebe9cf9@linux-foundation.org>
Signed-off-by: Linus Torvalds <69652caca27c8b940640ad396ab71f93cacec34f@linux-foundation.org>


rtc: sa1100: enable clk support

rtc: sa1100: enable clk support

Enable clock support on rtc-sa1100.

Signed-off-by: Haojian Zhuang <979139d45d262f0480136b0da512e0afa0fe79d3@marvell.com>

--- drivers/rtc/rtc-sa1100.c
+++ drivers/rtc/rtc-sa1100.c
@@ -23,6 +23,7 @@

 #include <linux/platform_device.h>
 #include <linux/module.h>
+#include <linux/clk.h>
 #include <linux/rtc.h>
 #include <linux/init.h>
 #include <linux/fs.h>
@@ -48,6 +49,7 @@
 	int			irq_1hz;
 	int			irq_alarm;
 	struct rtc_device	*rtc;
+	struct clk		*clk;
 };

 static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
@@ -104,6 +106,9 @@
 	struct rtc_device *rtc = info->rtc;
 	int ret;

+	ret = clk_prepare_enable(info->clk);
+	if (ret)
+		goto fail_clk;
 	ret = request_irq(info->irq_1hz, sa1100_rtc_interrupt, IRQF_DISABLED,
 		"rtc 1Hz", dev);
 	if (ret) {
@@ -124,6 +129,8 @@
  fail_ai:
 	free_irq(info->irq_1hz, dev);
  fail_ui:
+	clk_disable_unprepare(info->clk);
+ fail_clk:
 	return ret;
 }

@@ -137,6 +144,7 @@

 	free_irq(info->irq_alarm, dev);
 	free_irq(info->irq_1hz, dev);
+	clk_disable_unprepare(info->clk);
 }

 static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
@@ -234,6 +242,12 @@
 	info = kzalloc(sizeof(struct sa1100_rtc), GFP_KERNEL);
 	if (!info)
 		return -ENOMEM;
+	info->clk = clk_get(&pdev->dev, NULL);
+	if (IS_ERR(info->clk)) {
+		dev_err(&pdev->dev, "failed to find rtc clock source\n");
+		ret = PTR_ERR(info->clk);
+		goto err_clk;
+	}
 	info->irq_1hz = irq_1hz;
 	info->irq_alarm = irq_alarm;
 	spin_lock_init(&info->lock);
@@ -292,6 +306,8 @@
 	return 0;
 err_dev:
 	platform_set_drvdata(pdev, NULL);
+	clk_put(info->clk);
+err_clk:
 	kfree(info);
 	return ret;
 }
@@ -302,6 +318,7 @@

 	if (info) {
 		rtc_device_unregister(info->rtc);
+		clk_put(info->clk);
 		platform_set_drvdata(pdev, NULL);
 		kfree(info);
 	}


ARM: 6454/1: sa1100: Fix for a nasty initialization bug in the RTSR.

This patch fixes a nasty initialization condition on the RTSR register.
Sometimes, bit 1 will wake up set, sometimes not. This can be seen
by checking the value of the RTSR by typing '$ cat /proc/driver/rtc',
which has been provided by the previous patch.

If this bit is set, the command '$ cat /dev/rtc0' will lock the system
in an endless interrupt routine calling loop.

This patch fixes the issue both at sa1100_rtc_probe(), where it avoids
a spurious interrupt from happening, and at sa1100_rtc_interrupt(),
which is the robust solution, though it does not avoid the first
spurious interrupt.

Signed-off-by: Marcelo Roberto Jimenez <cbfee7cc2b5ad5adb7c008f3609da41bdbf85ffa@cpti.cetuc.puc-rio.br>
Signed-off-by: Russell King <f6aa0246ff943bfa8602cdf60d40c481b38ed232@arm.linux.org.uk>

--- drivers/rtc/rtc-sa1100.c
+++ drivers/rtc/rtc-sa1100.c
@@ -117,7 +117,23 @@
 	rtsr = RTSR;
 	/* clear interrupt sources */
 	RTSR = 0;
-	RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
+	/* Fix for a nasty initialization problem the in SA11xx RTSR register.
+	 * See also the comments in sa1100_rtc_probe(). */
+	if (rtsr & (RTSR_ALE | RTSR_HZE)) {
+		/* This is the original code, before there was the if test
+		 * above. This code does not clear interrupts that were not
+		 * enabled. */
+		RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
+	} else {
+		/* For some reason, it is possible to enter this routine
+		 * without interruptions enabled, it has been tested with
+		 * several units (Bug in SA11xx chip?).
+		 *
+		 * This situation leads to an infinite "loop" of interrupt
+		 * routine calling and as a result the processor seems to
+		 * lock on its first call to open(). */
+		RTSR = RTSR_AL | RTSR_HZ;
+	}

 	/* clear alarm interrupt if it has occurred */
 	if (rtsr & RTSR_AL)
@@ -382,6 +398,30 @@

 	platform_set_drvdata(pdev, rtc);

+	/* Fix for a nasty initialization problem the in SA11xx RTSR register.
+	 * See also the comments in sa1100_rtc_interrupt().
+	 *
+	 * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
+	 * interrupt pending, even though interrupts were never enabled.
+	 * In this case, this bit it must be reset before enabling
+	 * interruptions to avoid a nonexistent interrupt to occur.
+	 *
+	 * In principle, the same problem would apply to bit 0, although it has
+	 * never been observed to happen.
+	 *
+	 * This issue is addressed both here and in sa1100_rtc_interrupt().
+	 * If the issue is not addressed here, in the times when the processor
+	 * wakes up with the bit set there will be one spurious interrupt.
+	 *
+	 * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
+	 * safe side, once the condition that lead to this strange
+	 * initialization is unknown and could in principle happen during
+	 * normal processing.
+	 *
+	 * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
+	 * the corresponding bits in RTSR. */
+	RTSR = RTSR_AL | RTSR_HZ;
+
 	return 0;
 }


[SCSI] fcoe: fix regression on offload em matching function for initiator/target

This is a regression introduced by commit
1ff9918b625457ce20d450d00f9ed0a12ba191b7 The else statement here is breaking
the initiator logic of allocating xid from the offloaded em xid pool for READ
I/O only to use DDP, as shown by the snippet of trace below, where the WRITE
is using xid 0x5 from the offloaded em xid pool:

Protocol VID Len S_ID        D_ID     OX_ID  RX_ID  Summary
..
*FCP     228 96  0b.08.01 -> 01.0f.00 0x0005 0xffff SCSI: Write(10) LUN: 0x00
 FCP     228 76  01.0f.00 -> 0b.08.01 0x0005 0x828d XFER_RDY
...

The bug is in the else statement, for both initiator and target, the
new command will have FC frame header bit 23 (FC_FC_EX_CTX) cleared as it was
originated from the initiator. Also, this is assuming the frame header is
already filled up, which is only true for target since for initiator, this is a
new frame and oem_match gets called when em tries get xid for this i/o before
it is filled up and sent out.

The fix is to check if there is a fc_fcp_pkt associated w/ this frame from
fr_fsp(fp), since fr_fsp(fp) is NULL for tcm_fc target and non-I/O frame in
initiator. This should also return true for target only if it is an
FC_RCTL_DD_UNSOL_CMD and rx_id is not allocated.

Signed-off-by: Yi Zou <5b3a821cf7a153d601945bbe257e1150110342e4@intel.com>
Tested-by: Ross Brattain <ddebe0db9486ace8e4376a8be8a0aaa0090ac511@intel.com>
Signed-off-by: Robert Love <ae32029cc3b561e3768d1db8669e99f5bdf25e4b@intel.com>
Signed-off-by: James Bottomley <1acebbdca565c7b6b638bdc23b58b5610d1a56b8@Parallels.com>


[PATCH] libata-ncq: update EH to handle NCQ

Update EH to handle NCQ.  ata_eh_autopsy() is updated to call
ata_eh_analyze_ncq_error() which reads log page 10h on NCQ device
error and updates eh_context accordingly.  ata_eh_report() is updated
to report SActive.

Signed-off-by: Tejun Heo <ccfba69985e72fbcd9ba8bbb6db43d42971ad06d@gmail.com>

--- drivers/scsi/libata-eh.c
+++ drivers/scsi/libata-eh.c
@@ -685,6 +685,98 @@
 }

 /**
+ *	ata_read_log_page - read a specific log page
+ *	@dev: target device
+ *	@page: page to read
+ *	@buf: buffer to store read page
+ *	@sectors: number of sectors to read
+ *
+ *	Read log page using READ_LOG_EXT command.
+ *
+ *	LOCKING:
+ *	Kernel thread context (may sleep).
+ *
+ *	RETURNS:
+ *	0 on success, AC_ERR_* mask otherwise.
+ */
+static unsigned int ata_read_log_page(struct ata_device *dev,
+				      u8 page, void *buf, unsigned int sectors)
+{
+	struct ata_taskfile tf;
+	unsigned int err_mask;
+
+	DPRINTK("read log page - page %d\n", page);
+
+	ata_tf_init(dev, &tf);
+	tf.command = ATA_CMD_READ_LOG_EXT;
+	tf.lbal = page;
+	tf.nsect = sectors;
+	tf.hob_nsect = sectors >> 8;
+	tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_LBA48 | ATA_TFLAG_DEVICE;
+	tf.protocol = ATA_PROT_PIO;
+
+	err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
+				     buf, sectors * ATA_SECT_SIZE);
+
+	DPRINTK("EXIT, err_mask=%x\n", err_mask);
+	return err_mask;
+}
+
+/**
+ *	ata_eh_read_log_10h - Read log page 10h for NCQ error details
+ *	@dev: Device to read log page 10h from
+ *	@tag: Resulting tag of the failed command
+ *	@tf: Resulting taskfile registers of the failed command
+ *
+ *	Read log page 10h to obtain NCQ error details and clear error
+ *	condition.
+ *
+ *	LOCKING:
+ *	Kernel thread context (may sleep).
+ *
+ *	RETURNS:
+ *	0 on success, -errno otherwise.
+ */
+static int ata_eh_read_log_10h(struct ata_device *dev,
+			       int *tag, struct ata_taskfile *tf)
+{
+	u8 *buf = dev->ap->sector_buf;
+	unsigned int err_mask;
+	u8 csum;
+	int i;
+
+	err_mask = ata_read_log_page(dev, ATA_LOG_SATA_NCQ, buf, 1);
+	if (err_mask)
+		return -EIO;
+
+	csum = 0;
+	for (i = 0; i < ATA_SECT_SIZE; i++)
+		csum += buf[i];
+	if (csum)
+		ata_dev_printk(dev, KERN_WARNING,
+			       "invalid checksum 0x%x on log page 10h\n", csum);
+
+	if (buf[0] & 0x80)
+		return -ENOENT;
+
+	*tag = buf[0] & 0x1f;
+
+	tf->command = buf[2];
+	tf->feature = buf[3];
+	tf->lbal = buf[4];
+	tf->lbam = buf[5];
+	tf->lbah = buf[6];
+	tf->device = buf[7];
+	tf->hob_lbal = buf[8];
+	tf->hob_lbam = buf[9];
+	tf->hob_lbah = buf[10];
+	tf->nsect = buf[12];
+	tf->hob_nsect = buf[13];
+
+	return 0;
+}
+
+/**
  *	atapi_eh_request_sense - perform ATAPI REQUEST_SENSE
  *	@dev: device to perform REQUEST_SENSE to
  *	@sense_buf: result sense data buffer (SCSI_SENSE_BUFFERSIZE bytes long)
@@ -780,6 +872,66 @@

 	ehc->i.err_mask |= err_mask;
 	ehc->i.action |= action;
+}
+
+/**
+ *	ata_eh_analyze_ncq_error - analyze NCQ error
+ *	@ap: ATA port to analyze NCQ error for
+ *
+ *	Read log page 10h, determine the offending qc and acquire
+ *	error status TF.  For NCQ device errors, all LLDDs have to do
+ *	is setting AC_ERR_DEV in ehi->err_mask.  This function takes
+ *	care of the rest.
+ *
+ *	LOCKING:
+ *	Kernel thread context (may sleep).
+ */
+static void ata_eh_analyze_ncq_error(struct ata_port *ap)
+{
+	struct ata_eh_context *ehc = &ap->eh_context;
+	struct ata_device *dev = ap->device;
+	struct ata_queued_cmd *qc;
+	struct ata_taskfile tf;
+	int tag, rc;
+
+	/* if frozen, we can't do much */
+	if (ap->flags & ATA_FLAG_FROZEN)
+		return;
+
+	/* is it NCQ device error? */
+	if (!ap->sactive || !(ehc->i.err_mask & AC_ERR_DEV))
+		return;
+
+	/* has LLDD analyzed already? */
+	for (tag = 0; tag < ATA_MAX_QUEUE; tag++) {
+		qc = __ata_qc_from_tag(ap, tag);
+
+		if (!(qc->flags & ATA_QCFLAG_FAILED))
+			continue;
+
+		if (qc->err_mask)
+			return;
+	}
+
+	/* okay, this error is ours */
+	rc = ata_eh_read_log_10h(dev, &tag, &tf);
+	if (rc) {
+		ata_port_printk(ap, KERN_ERR, "failed to read log page 10h "
+				"(errno=%d)\n", rc);
+		return;
+	}
+
+	if (!(ap->sactive & (1 << tag))) {
+		ata_port_printk(ap, KERN_ERR, "log page 10h reported "
+				"inactive tag %d\n", tag);
+		return;
+	}
+
+	/* we've got the perpetrator, condemn it */
+	qc = __ata_qc_from_tag(ap, tag);
+	memcpy(&qc->result_tf, &tf, sizeof(tf));
+	qc->err_mask |= AC_ERR_DEV;
+	ehc->i.err_mask &= ~AC_ERR_DEV;
 }

 /**
@@ -999,6 +1151,9 @@
 	} else if (rc != -EOPNOTSUPP)
 		action |= ATA_EH_HARDRESET;

+	/* analyze NCQ failure */
+	ata_eh_analyze_ncq_error(ap);
+
 	/* any real error trumps AC_ERR_OTHER */
 	if (ehc->i.err_mask & ~AC_ERR_OTHER)
 		ehc->i.err_mask &= ~AC_ERR_OTHER;
@@ -1093,17 +1248,17 @@
 		frozen = " frozen";

 	if (ehc->i.dev) {
-		ata_dev_printk(ehc->i.dev, KERN_ERR,
-			       "exception Emask 0x%x SErr 0x%x action 0x%x%s\n",
-			       ehc->i.err_mask, ehc->i.serror, ehc->i.action,
-			       frozen);
+		ata_dev_printk(ehc->i.dev, KERN_ERR, "exception Emask 0x%x "
+			       "SAct 0x%x SErr 0x%x action 0x%x%s\n",
+			       ehc->i.err_mask, ap->sactive, ehc->i.serror,
+			       ehc->i.action, frozen);
 		if (desc)
 			ata_dev_printk(ehc->i.dev, KERN_ERR, "(%s)\n", desc);
 	} else {
-		ata_port_printk(ap, KERN_ERR,
-				"exception Emask 0x%x SErr 0x%x action 0x%x%s\n",
-				ehc->i.err_mask, ehc->i.serror, ehc->i.action,
-				frozen);
+		ata_port_printk(ap, KERN_ERR, "exception Emask 0x%x "
+				"SAct 0x%x SErr 0x%x action 0x%x%s\n",
+				ehc->i.err_mask, ap->sactive, ehc->i.serror,
+				ehc->i.action, frozen);
 		if (desc)
 			ata_port_printk(ap, KERN_ERR, "(%s)\n", desc);
 	}


spi-pl022: Add missing return value update

Return error on out of range cpsdvsr value.

Acked-by: Linus Walleij <9cd9d802d23c0ed5e224beabf4ae4a5c478746ef@linaro.org>
Signed-off-by: Virupax Sadashivpetimath <937cd09833e84ec8506aa26a210177c07752c6db@stericsson.com>
Signed-off-by: Grant Likely <9069e6f5a2b566e2674a0ba1e2bf39c12c195fad@secretlab.ca>